Search

David M. Mitchell

Examiner (ID: 18472)

Most Active Art Unit
3106
Art Unit(s)
3104, 3612, 3102, 3106
Total Applications
820
Issued Applications
743
Pending Applications
2
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10105525 [patent_doc_number] => 09141306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Information processing apparatus and area release control method' [patent_app_type] => utility [patent_app_number] => 13/951545 [patent_app_country] => US [patent_app_date] => 2013-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9406 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951545 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951545
Information processing apparatus and area release control method Jul 25, 2013 Issued
Array ( [id] => 10596351 [patent_doc_number] => 09317440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Computing device and virtual device control method for controlling virtual device by computing system' [patent_app_type] => utility [patent_app_number] => 13/951491 [patent_app_country] => US [patent_app_date] => 2013-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6911 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951491 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951491
Computing device and virtual device control method for controlling virtual device by computing system Jul 25, 2013 Issued
Array ( [id] => 11220528 [patent_doc_number] => 09448864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Method and apparatus for processing message between processors' [patent_app_type] => utility [patent_app_number] => 14/420713 [patent_app_country] => US [patent_app_date] => 2013-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4482 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14420713 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/420713
Method and apparatus for processing message between processors Jul 22, 2013 Issued
Array ( [id] => 10046414 [patent_doc_number] => 09086811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Managing data sets of a storage system' [patent_app_type] => utility [patent_app_number] => 13/943875 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943875 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943875
Managing data sets of a storage system Jul 16, 2013 Issued
Array ( [id] => 9270965 [patent_doc_number] => 20140025883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'STORAGE OF A DESIRED ADDRESS IN A DEVICE OF A CONTROL SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/943892 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5893 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943892
Storage of a desired address in a device of a control system Jul 16, 2013 Issued
Array ( [id] => 10144096 [patent_doc_number] => 09176906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Memory controller and memory system including the same' [patent_app_type] => utility [patent_app_number] => 13/943912 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5332 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943912 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943912
Memory controller and memory system including the same Jul 16, 2013 Issued
Array ( [id] => 9270962 [patent_doc_number] => 20140025880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'SEMICONDUCTOR MEMORY CELL ARRAY HAVING FAST ARRAY AREA AND SEMICONDUCTOR MEMORY INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/943790 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11501 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943790 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943790
Semiconductor memory cell array having fast array area and semiconductor memory including the same Jul 16, 2013 Issued
Array ( [id] => 10124121 [patent_doc_number] => 09158478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Storage system and storage control method' [patent_app_type] => utility [patent_app_number] => 13/932082 [patent_app_country] => US [patent_app_date] => 2013-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11251 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13932082 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/932082
Storage system and storage control method Jun 30, 2013 Issued
Array ( [id] => 10517777 [patent_doc_number] => 09244824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Memory sub-system and computing system including the same' [patent_app_type] => utility [patent_app_number] => 13/932352 [patent_app_country] => US [patent_app_date] => 2013-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8463 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13932352 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/932352
Memory sub-system and computing system including the same Jun 30, 2013 Issued
Array ( [id] => 9207547 [patent_doc_number] => 20140006724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'EFFICIENT MEMORY MANAGEMENT FOR PARALLEL SYNCHRONOUS COMPUTING SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/932847 [patent_app_country] => US [patent_app_date] => 2013-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13932847 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/932847
Efficient memory management for parallel synchronous computing systems Jun 30, 2013 Issued
Array ( [id] => 9532492 [patent_doc_number] => 08756375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Non-volatile cache' [patent_app_type] => utility [patent_app_number] => 13/931897 [patent_app_country] => US [patent_app_date] => 2013-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 43097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13931897 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/931897
Non-volatile cache Jun 28, 2013 Issued
Array ( [id] => 9264763 [patent_doc_number] => 20130346692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'NON-BLOCKING DATA TRANSFER VIA MEMORY CACHE MANIPULATION' [patent_app_type] => utility [patent_app_number] => 13/931741 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11498 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13931741 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/931741
Non-blocking data transfer via memory cache manipulation Jun 27, 2013 Issued
Array ( [id] => 9532493 [patent_doc_number] => 08756379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Managing concurrent accesses to a cache' [patent_app_type] => utility [patent_app_number] => 13/925356 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6321 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925356 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925356
Managing concurrent accesses to a cache Jun 23, 2013 Issued
Array ( [id] => 9289301 [patent_doc_number] => 08645657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Scheduling of I/O writes in a storage environment' [patent_app_type] => utility [patent_app_number] => 13/919151 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11567 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919151
Scheduling of I/O writes in a storage environment Jun 16, 2013 Issued
Array ( [id] => 10157580 [patent_doc_number] => 09189360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Processor that records tracing data in non contiguous system memory slices' [patent_app_type] => utility [patent_app_number] => 13/918940 [patent_app_country] => US [patent_app_date] => 2013-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918940 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/918940
Processor that records tracing data in non contiguous system memory slices Jun 14, 2013 Issued
Array ( [id] => 10630237 [patent_doc_number] => 09348385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Hybrid computing module' [patent_app_type] => utility [patent_app_number] => 13/917607 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19087 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917607 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917607
Hybrid computing module Jun 12, 2013 Issued
Array ( [id] => 10873173 [patent_doc_number] => 08898393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Optimized ring protocols and techniques' [patent_app_type] => utility [patent_app_number] => 13/901190 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5654 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13901190 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/901190
Optimized ring protocols and techniques May 22, 2013 Issued
Array ( [id] => 9044077 [patent_doc_number] => 20130246715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'COMMUNICATION APPARATUS, LOAD DISTRIBUTION METHOD, AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/889109 [patent_app_country] => US [patent_app_date] => 2013-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 19021 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13889109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/889109
Communication apparatus, load distribution method, and recording medium May 6, 2013 Issued
Array ( [id] => 10873205 [patent_doc_number] => 08898424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Memory address translation' [patent_app_type] => utility [patent_app_number] => 13/859502 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5622 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859502
Memory address translation Apr 8, 2013 Issued
Array ( [id] => 10873205 [patent_doc_number] => 08898424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Memory address translation' [patent_app_type] => utility [patent_app_number] => 13/859502 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5622 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859502
Memory address translation Apr 8, 2013 Issued
Menu