Search

David M. Mitchell

Examiner (ID: 18472)

Most Active Art Unit
3106
Art Unit(s)
3104, 3612, 3102, 3106
Total Applications
820
Issued Applications
743
Pending Applications
2
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6189191 [patent_doc_number] => 20110125957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'System for accessing non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/931198 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20110125957.pdf [firstpage_image] =>[orig_patent_app_number] => 12931198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931198
System for accessing non-volatile memory Jan 24, 2011 Issued
Array ( [id] => 8022483 [patent_doc_number] => 08140757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-03-20 [patent_title] => 'Network acceleration and long-distance pattern detection using improved caching and disk mapping' [patent_app_type] => utility [patent_app_number] => 13/007869 [patent_app_country] => US [patent_app_date] => 2011-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140757.pdf [firstpage_image] =>[orig_patent_app_number] => 13007869 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/007869
Network acceleration and long-distance pattern detection using improved caching and disk mapping Jan 16, 2011 Issued
Array ( [id] => 8303289 [patent_doc_number] => 20120185847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'SYSTEM AND METHOD FOR LOCKING MEMORY AREAS IN A JVM TO FACILITATE SHARING BETWEEN VIRTUAL SERVERS' [patent_app_type] => utility [patent_app_number] => 13/007429 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2497 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13007429 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/007429
System and method for locking memory areas in a JVM to facilitate sharing between virtual servers Jan 13, 2011 Issued
Array ( [id] => 9123734 [patent_doc_number] => 20130290656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'Concurrent Request Scheduling' [patent_app_type] => utility [patent_app_number] => 13/977903 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12757 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13977903 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/977903
Concurrent request scheduling Jan 10, 2011 Issued
Array ( [id] => 9235898 [patent_doc_number] => 08601214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-03 [patent_title] => 'System and method for write-back cache in sparse volumes' [patent_app_type] => utility [patent_app_number] => 12/986050 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7717 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986050 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986050
System and method for write-back cache in sparse volumes Jan 5, 2011 Issued
Array ( [id] => 8291522 [patent_doc_number] => 20120179853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'MEMORY ADDRESS TRANSLATION' [patent_app_type] => utility [patent_app_number] => 12/985787 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5577 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985787 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985787
Memory address translation Jan 5, 2011 Issued
Array ( [id] => 7722005 [patent_doc_number] => 20120011340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'Apparatus, System, and Method for a Virtual Storage Layer' [patent_app_type] => utility [patent_app_number] => 12/986117 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 47138 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20120011340.pdf [firstpage_image] =>[orig_patent_app_number] => 12986117 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986117
Apparatus, system, and method for a storage layer Jan 5, 2011 Issued
Array ( [id] => 8291544 [patent_doc_number] => 20120179876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'Cache-Based Speculation of Stores Following Synchronizing Operations' [patent_app_type] => utility [patent_app_number] => 12/985590 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7319 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985590 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985590
Cache-based speculation of stores following synchronizing operations Jan 5, 2011 Issued
Array ( [id] => 6104770 [patent_doc_number] => 20110167201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'EXPANDABLE CAPACITY SOLID STATE DRIVE' [patent_app_type] => utility [patent_app_number] => 12/986116 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7470 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20110167201.pdf [firstpage_image] =>[orig_patent_app_number] => 12986116 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986116
EXPANDABLE CAPACITY SOLID STATE DRIVE Jan 5, 2011 Abandoned
Array ( [id] => 8143347 [patent_doc_number] => 20120096220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'BIT WEAVING TECHNIQUE FOR COMPRESSING PACKET CLASSIFIERS' [patent_app_type] => utility [patent_app_number] => 12/985407 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8344 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096220.pdf [firstpage_image] =>[orig_patent_app_number] => 12985407 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985407
Bit weaving technique for compressing packet classifiers Jan 5, 2011 Issued
Array ( [id] => 9102648 [patent_doc_number] => 08566542 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-22 [patent_title] => 'Backup using storage array LUN level snapshot' [patent_app_type] => utility [patent_app_number] => 12/985893 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2539 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985893 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985893
Backup using storage array LUN level snapshot Jan 5, 2011 Issued
Array ( [id] => 8861463 [patent_doc_number] => 08464017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Apparatus and method for processing data in a massively parallel processor array system' [patent_app_type] => utility [patent_app_number] => 12/985694 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3373 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985694 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985694
Apparatus and method for processing data in a massively parallel processor array system Jan 5, 2011 Issued
Array ( [id] => 5990498 [patent_doc_number] => 20110099341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'SYSTEM, APPARATUS, AND METHOD FOR MODIFYING THE ORDER OF MEMORY ACCESSES' [patent_app_type] => utility [patent_app_number] => 12/984711 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7402 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20110099341.pdf [firstpage_image] =>[orig_patent_app_number] => 12984711 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984711
System, apparatus, and method for modifying the order of memory accesses Jan 4, 2011 Issued
Array ( [id] => 8267310 [patent_doc_number] => 20120166738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'MANAGING SHARED DATA OBJECTS TO PROVIDE VISIBILITY TO SHARED MEMORY' [patent_app_type] => utility [patent_app_number] => 12/979505 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5063 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979505 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979505
Managing shared data objects to provide visibility to shared memory Dec 27, 2010 Issued
Array ( [id] => 7759734 [patent_doc_number] => 20120030412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'Systems and Methods for Implementing a Programming Sequence to Enhance Die Interleave' [patent_app_type] => utility [patent_app_number] => 12/979686 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6326 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20120030412.pdf [firstpage_image] =>[orig_patent_app_number] => 12979686 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979686
Systems and methods for implementing a programming sequence to enhance die interleave Dec 27, 2010 Issued
Array ( [id] => 9257713 [patent_doc_number] => 08621153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Microcode refactoring and caching' [patent_app_type] => utility [patent_app_number] => 12/978583 [patent_app_country] => US [patent_app_date] => 2010-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978583 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978583
Microcode refactoring and caching Dec 25, 2010 Issued
Array ( [id] => 8443440 [patent_doc_number] => 20120260057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'COUNTER ARCHITECTURE FOR ONLINE DVFS PROFITABILITY ESTIMATION' [patent_app_type] => utility [patent_app_number] => 13/516850 [patent_app_country] => US [patent_app_date] => 2010-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11285 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13516850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/516850
Counter architecture for online DVFS profitability estimation Dec 9, 2010 Issued
Array ( [id] => 8971702 [patent_doc_number] => 08510530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-13 [patent_title] => 'Memory management for programs operating asynchronously' [patent_app_type] => utility [patent_app_number] => 12/963740 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5092 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963740 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963740
Memory management for programs operating asynchronously Dec 8, 2010 Issued
Array ( [id] => 9680428 [patent_doc_number] => 08819355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Information processing apparatus, information processing method, and program' [patent_app_type] => utility [patent_app_number] => 13/514792 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8621 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13514792 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/514792
Information processing apparatus, information processing method, and program Nov 10, 2010 Issued
Array ( [id] => 4636914 [patent_doc_number] => 08015377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Method and apparatus for de-duplication after mirror operation' [patent_app_type] => utility [patent_app_number] => 12/938823 [patent_app_country] => US [patent_app_date] => 2010-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 13612 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/015/08015377.pdf [firstpage_image] =>[orig_patent_app_number] => 12938823 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938823
Method and apparatus for de-duplication after mirror operation Nov 2, 2010 Issued
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