Search

David M. Mitchell

Examiner (ID: 18472)

Most Active Art Unit
3106
Art Unit(s)
3104, 3612, 3102, 3106
Total Applications
820
Issued Applications
743
Pending Applications
2
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6073501 [patent_doc_number] => 20110047327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'SEARCHING A CONTENT ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/913050 [patent_app_country] => US [patent_app_date] => 2010-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4200 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047327.pdf [firstpage_image] =>[orig_patent_app_number] => 12913050 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/913050
Searching a content addressable memory with modifiable comparands Oct 26, 2010 Issued
Array ( [id] => 8058977 [patent_doc_number] => 20120079214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY CACHE FOR HOTLY CONTESTED CACHE LINES' [patent_app_type] => utility [patent_app_number] => 12/890649 [patent_app_country] => US [patent_app_date] => 2010-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5976 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079214.pdf [firstpage_image] =>[orig_patent_app_number] => 12890649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/890649
Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines Sep 24, 2010 Issued
Array ( [id] => 8872922 [patent_doc_number] => 08468309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Optimized ring protocols and techniques' [patent_app_type] => utility [patent_app_number] => 12/890650 [patent_app_country] => US [patent_app_date] => 2010-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5634 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12890650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/890650
Optimized ring protocols and techniques Sep 24, 2010 Issued
Array ( [id] => 8971701 [patent_doc_number] => 08510529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Method for generating program and method for operating system' [patent_app_type] => utility [patent_app_number] => 12/888614 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 23568 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888614 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888614
Method for generating program and method for operating system Sep 22, 2010 Issued
Array ( [id] => 8058963 [patent_doc_number] => 20120079212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES' [patent_app_type] => utility [patent_app_number] => 12/888883 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6793 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20120079212.pdf [firstpage_image] =>[orig_patent_app_number] => 12888883 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888883
ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES Sep 22, 2010 Abandoned
Array ( [id] => 9257721 [patent_doc_number] => 08621161 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-31 [patent_title] => 'Moving data between data stores' [patent_app_type] => utility [patent_app_number] => 12/888731 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11283 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888731 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888731
Moving data between data stores Sep 22, 2010 Issued
Array ( [id] => 9532484 [patent_doc_number] => 08756370 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-17 [patent_title] => 'Non-disruptive drive firmware upgrades' [patent_app_type] => utility [patent_app_number] => 12/888943 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7710 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888943 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/888943
Non-disruptive drive firmware upgrades Sep 22, 2010 Issued
Array ( [id] => 8045797 [patent_doc_number] => 20120072632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'Deterministic and non-Deterministic Execution in One Processor' [patent_app_type] => utility [patent_app_number] => 12/885401 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5701 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072632.pdf [firstpage_image] =>[orig_patent_app_number] => 12885401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885401
Deterministic and non-Deterministic Execution in One Processor Sep 16, 2010 Abandoned
Array ( [id] => 7492868 [patent_doc_number] => 20110238889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE FROM WHICH DATA CAN BE READ AT LOW POWER' [patent_app_type] => utility [patent_app_number] => 12/884648 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6620 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20110238889.pdf [firstpage_image] =>[orig_patent_app_number] => 12884648 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884648
SEMICONDUCTOR MEMORY DEVICE FROM WHICH DATA CAN BE READ AT LOW POWER Sep 16, 2010 Abandoned
Array ( [id] => 6073870 [patent_doc_number] => 20110047437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR GRACEFUL CACHE DEVICE DEGRADATION' [patent_app_type] => utility [patent_app_number] => 12/885285 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 16120 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047437.pdf [firstpage_image] =>[orig_patent_app_number] => 12885285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885285
Apparatus, system, and method for graceful cache device degradation Sep 16, 2010 Issued
Array ( [id] => 9156726 [patent_doc_number] => 08589639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Memory management unit and memory management method for controlling a nonvolatile memory and a volatile memory' [patent_app_type] => utility [patent_app_number] => 12/884601 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 34 [patent_no_of_words] => 11718 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12884601 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884601
Memory management unit and memory management method for controlling a nonvolatile memory and a volatile memory Sep 16, 2010 Issued
Array ( [id] => 7694980 [patent_doc_number] => 20110231610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/884844 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12013 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231610.pdf [firstpage_image] =>[orig_patent_app_number] => 12884844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884844
Memory system comprising blocks operable in parallel Sep 16, 2010 Issued
Array ( [id] => 6057253 [patent_doc_number] => 20110113187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/884590 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13084 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20110113187.pdf [firstpage_image] =>[orig_patent_app_number] => 12884590 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884590
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THE SAME Sep 16, 2010 Abandoned
Array ( [id] => 6040602 [patent_doc_number] => 20110093651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'DATA STORAGE APPARATUS AND CONTROLLING METHOD OF THE DATA STORAGE APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/883020 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2527 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20110093651.pdf [firstpage_image] =>[orig_patent_app_number] => 12883020 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883020
DATA STORAGE APPARATUS AND CONTROLLING METHOD OF THE DATA STORAGE APPARATUS Sep 14, 2010 Abandoned
Array ( [id] => 8872931 [patent_doc_number] => 08468318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Scheduling of I/O writes in a storage environment' [patent_app_type] => utility [patent_app_number] => 12/882877 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11538 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12882877 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882877
Scheduling of I/O writes in a storage environment Sep 14, 2010 Issued
Array ( [id] => 6362379 [patent_doc_number] => 20100332743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SYSTEM AND METHOD FOR WRITING CACHE DATA AND SYSTEM AND METHOD FOR READING CACHE DATA' [patent_app_type] => utility [patent_app_number] => 12/877977 [patent_app_country] => US [patent_app_date] => 2010-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4508 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332743.pdf [firstpage_image] =>[orig_patent_app_number] => 12877977 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/877977
System and method for writing cache data and system and method for reading cache data Sep 7, 2010 Issued
Array ( [id] => 8366572 [patent_doc_number] => 08255650 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-28 [patent_title] => 'Systems and methods for making incremental physical to virtual backups of computer system data' [patent_app_type] => utility [patent_app_number] => 12/861629 [patent_app_country] => US [patent_app_date] => 2010-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 14549 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12861629 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/861629
Systems and methods for making incremental physical to virtual backups of computer system data Aug 22, 2010 Issued
Array ( [id] => 7537615 [patent_doc_number] => 08051258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Apparatus and methods using invalidity indicators for buffered memory' [patent_app_type] => utility [patent_app_number] => 12/860961 [patent_app_country] => US [patent_app_date] => 2010-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4667 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051258.pdf [firstpage_image] =>[orig_patent_app_number] => 12860961 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/860961
Apparatus and methods using invalidity indicators for buffered memory Aug 22, 2010 Issued
Array ( [id] => 5948407 [patent_doc_number] => 20110107027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'INDIRECT STORAGE OF DATA IN A DISPERSED STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/850607 [patent_app_country] => US [patent_app_date] => 2010-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 23976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107027.pdf [firstpage_image] =>[orig_patent_app_number] => 12850607 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/850607
Indirect storage of data in a dispersed storage system Aug 3, 2010 Issued
Array ( [id] => 8804880 [patent_doc_number] => 08443163 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-14 [patent_title] => 'Methods, systems, and computer readable medium for tier-based data storage resource allocation and data relocation in a data storage array' [patent_app_type] => utility [patent_app_number] => 12/824816 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10692 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 21 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824816 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/824816
Methods, systems, and computer readable medium for tier-based data storage resource allocation and data relocation in a data storage array Jun 27, 2010 Issued
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