
David M. Mitchell
Examiner (ID: 18472)
| Most Active Art Unit | 3106 |
| Art Unit(s) | 3104, 3612, 3102, 3106 |
| Total Applications | 820 |
| Issued Applications | 743 |
| Pending Applications | 2 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6073501
[patent_doc_number] => 20110047327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'SEARCHING A CONTENT ADDRESSABLE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/913050
[patent_app_country] => US
[patent_app_date] => 2010-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4200
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[pdf_file] => publications/A1/0047/20110047327.pdf
[firstpage_image] =>[orig_patent_app_number] => 12913050
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/913050 | Searching a content addressable memory with modifiable comparands | Oct 26, 2010 | Issued |
Array
(
[id] => 8058977
[patent_doc_number] => 20120079214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY CACHE FOR HOTLY CONTESTED CACHE LINES'
[patent_app_type] => utility
[patent_app_number] => 12/890649
[patent_app_country] => US
[patent_app_date] => 2010-09-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/890649 | Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines | Sep 24, 2010 | Issued |
Array
(
[id] => 8872922
[patent_doc_number] => 08468309
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-18
[patent_title] => 'Optimized ring protocols and techniques'
[patent_app_type] => utility
[patent_app_number] => 12/890650
[patent_app_country] => US
[patent_app_date] => 2010-09-25
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/890650 | Optimized ring protocols and techniques | Sep 24, 2010 | Issued |
Array
(
[id] => 8971701
[patent_doc_number] => 08510529
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[patent_kind] => B2
[patent_issue_date] => 2013-08-13
[patent_title] => 'Method for generating program and method for operating system'
[patent_app_type] => utility
[patent_app_number] => 12/888614
[patent_app_country] => US
[patent_app_date] => 2010-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 57
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/888614 | Method for generating program and method for operating system | Sep 22, 2010 | Issued |
Array
(
[id] => 8058963
[patent_doc_number] => 20120079212
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[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES'
[patent_app_type] => utility
[patent_app_number] => 12/888883
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[patent_app_date] => 2010-09-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/888883 | ARCHITECTURE FOR SHARING CACHES AMONG MULTIPLE PROCESSES | Sep 22, 2010 | Abandoned |
Array
(
[id] => 9257721
[patent_doc_number] => 08621161
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[patent_issue_date] => 2013-12-31
[patent_title] => 'Moving data between data stores'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/888731 | Moving data between data stores | Sep 22, 2010 | Issued |
Array
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[id] => 9532484
[patent_doc_number] => 08756370
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[patent_issue_date] => 2014-06-17
[patent_title] => 'Non-disruptive drive firmware upgrades'
[patent_app_type] => utility
[patent_app_number] => 12/888943
[patent_app_country] => US
[patent_app_date] => 2010-09-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/888943 | Non-disruptive drive firmware upgrades | Sep 22, 2010 | Issued |
Array
(
[id] => 8045797
[patent_doc_number] => 20120072632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-22
[patent_title] => 'Deterministic and non-Deterministic Execution in One Processor'
[patent_app_type] => utility
[patent_app_number] => 12/885401
[patent_app_country] => US
[patent_app_date] => 2010-09-17
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[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0072/20120072632.pdf
[firstpage_image] =>[orig_patent_app_number] => 12885401
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885401 | Deterministic and non-Deterministic Execution in One Processor | Sep 16, 2010 | Abandoned |
Array
(
[id] => 7492868
[patent_doc_number] => 20110238889
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[patent_kind] => A1
[patent_issue_date] => 2011-09-29
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE FROM WHICH DATA CAN BE READ AT LOW POWER'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/884648 | SEMICONDUCTOR MEMORY DEVICE FROM WHICH DATA CAN BE READ AT LOW POWER | Sep 16, 2010 | Abandoned |
Array
(
[id] => 6073870
[patent_doc_number] => 20110047437
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR GRACEFUL CACHE DEVICE DEGRADATION'
[patent_app_type] => utility
[patent_app_number] => 12/885285
[patent_app_country] => US
[patent_app_date] => 2010-09-17
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885285 | Apparatus, system, and method for graceful cache device degradation | Sep 16, 2010 | Issued |
Array
(
[id] => 9156726
[patent_doc_number] => 08589639
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[patent_issue_date] => 2013-11-19
[patent_title] => 'Memory management unit and memory management method for controlling a nonvolatile memory and a volatile memory'
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Array
(
[id] => 7694980
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[patent_title] => 'MEMORY SYSTEM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/884844 | Memory system comprising blocks operable in parallel | Sep 16, 2010 | Issued |
Array
(
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/877977 | System and method for writing cache data and system and method for reading cache data | Sep 7, 2010 | Issued |
Array
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Array
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