
David M. Mitchell
Examiner (ID: 18472)
| Most Active Art Unit | 3106 |
| Art Unit(s) | 3104, 3612, 3102, 3106 |
| Total Applications | 820 |
| Issued Applications | 743 |
| Pending Applications | 2 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7293442
[patent_doc_number] => 20040111588
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'System and method for managing a cache memory'
[patent_app_type] => new
[patent_app_number] => 10/724472
[patent_app_country] => US
[patent_app_date] => 2003-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8334
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0111/20040111588.pdf
[firstpage_image] =>[orig_patent_app_number] => 10724472
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/724472 | System and method for managing a cache memory | Nov 25, 2003 | Issued |
Array
(
[id] => 7246534
[patent_doc_number] => 20040158687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-12
[patent_title] => 'Distributed raid and location independence caching system'
[patent_app_type] => new
[patent_app_number] => 10/693077
[patent_app_country] => US
[patent_app_date] => 2003-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2281
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20040158687.pdf
[firstpage_image] =>[orig_patent_app_number] => 10693077
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/693077 | Distributed raid and location independence caching system | Oct 23, 2003 | Abandoned |
Array
(
[id] => 679984
[patent_doc_number] => 07089370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-08
[patent_title] => 'Apparatus and method for pre-fetching page data using segment table data'
[patent_app_type] => utility
[patent_app_number] => 10/675170
[patent_app_country] => US
[patent_app_date] => 2003-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 15570
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/089/07089370.pdf
[firstpage_image] =>[orig_patent_app_number] => 10675170
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/675170 | Apparatus and method for pre-fetching page data using segment table data | Sep 29, 2003 | Issued |
Array
(
[id] => 7605723
[patent_doc_number] => 07099999
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-29
[patent_title] => 'Apparatus and method for pre-fetching data to cached memory using persistent historical page table data'
[patent_app_type] => utility
[patent_app_number] => 10/675732
[patent_app_country] => US
[patent_app_date] => 2003-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 15594
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/099/07099999.pdf
[firstpage_image] =>[orig_patent_app_number] => 10675732
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/675732 | Apparatus and method for pre-fetching data to cached memory using persistent historical page table data | Sep 29, 2003 | Issued |
Array
(
[id] => 641066
[patent_doc_number] => 07127547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-24
[patent_title] => 'Processor with multiple linked list storage feature'
[patent_app_type] => utility
[patent_app_number] => 10/675717
[patent_app_country] => US
[patent_app_date] => 2003-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4468
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/127/07127547.pdf
[firstpage_image] =>[orig_patent_app_number] => 10675717
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/675717 | Processor with multiple linked list storage feature | Sep 29, 2003 | Issued |
Array
(
[id] => 7013669
[patent_doc_number] => 20050066222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Systems and methods for time dependent data storage and recovery'
[patent_app_type] => utility
[patent_app_number] => 10/668833
[patent_app_country] => US
[patent_app_date] => 2003-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 20823
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20050066222.pdf
[firstpage_image] =>[orig_patent_app_number] => 10668833
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/668833 | Systems and methods for time dependent data storage and recovery | Sep 22, 2003 | Issued |
Array
(
[id] => 7013488
[patent_doc_number] => 20050066130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Multilevel segmented memory'
[patent_app_type] => utility
[patent_app_number] => 10/668713
[patent_app_country] => US
[patent_app_date] => 2003-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4106
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20050066130.pdf
[firstpage_image] =>[orig_patent_app_number] => 10668713
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/668713 | Multilevel segmented memory | Sep 22, 2003 | Issued |
Array
(
[id] => 8170564
[patent_doc_number] => 08176250
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-08
[patent_title] => 'System and method for testing a memory'
[patent_app_type] => utility
[patent_app_number] => 10/652536
[patent_app_country] => US
[patent_app_date] => 2003-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3859
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/176/08176250.pdf
[firstpage_image] =>[orig_patent_app_number] => 10652536
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652536 | System and method for testing a memory | Aug 28, 2003 | Issued |
Array
(
[id] => 659276
[patent_doc_number] => 07111113
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-19
[patent_title] => 'Apparatus and method to write information to and/or read information from an information storage medium'
[patent_app_type] => utility
[patent_app_number] => 10/652162
[patent_app_country] => US
[patent_app_date] => 2003-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 12191
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/111/07111113.pdf
[firstpage_image] =>[orig_patent_app_number] => 10652162
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652162 | Apparatus and method to write information to and/or read information from an information storage medium | Aug 28, 2003 | Issued |
Array
(
[id] => 7174113
[patent_doc_number] => 20040078523
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Memory management of local variables'
[patent_app_type] => new
[patent_app_number] => 10/632067
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7638
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20040078523.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632067
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632067 | Memory management of local variables | Jul 30, 2003 | Issued |
Array
(
[id] => 7412345
[patent_doc_number] => 20040024969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-05
[patent_title] => 'Methods and apparatuses for managing memory'
[patent_app_type] => new
[patent_app_number] => 10/631252
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3952
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20040024969.pdf
[firstpage_image] =>[orig_patent_app_number] => 10631252
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/631252 | Methods and apparatuses for managing memory | Jul 30, 2003 | Abandoned |
Array
(
[id] => 7174108
[patent_doc_number] => 20040078522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Memory management of local variables upon a change of context'
[patent_app_type] => new
[patent_app_number] => 10/632076
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9226
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 27
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20040078522.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632076
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632076 | Memory management of local variables upon a change of context | Jul 30, 2003 | Issued |
Array
(
[id] => 7160616
[patent_doc_number] => 20050028039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism'
[patent_app_type] => utility
[patent_app_number] => 10/631067
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7325
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20050028039.pdf
[firstpage_image] =>[orig_patent_app_number] => 10631067
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/631067 | Method and apparatus for coordinating dynamic memory deallocation with a redundant bit line steering mechanism | Jul 30, 2003 | Issued |
Array
(
[id] => 7316049
[patent_doc_number] => 20040034748
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-19
[patent_title] => 'Memory device containing arbiter performing arbitration for bus access right'
[patent_app_type] => new
[patent_app_number] => 10/615234
[patent_app_country] => US
[patent_app_date] => 2003-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3300
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20040034748.pdf
[firstpage_image] =>[orig_patent_app_number] => 10615234
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/615234 | Memory device containing arbiter performing arbitration for bus access right | Jul 8, 2003 | Abandoned |
Array
(
[id] => 7162917
[patent_doc_number] => 20040076044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-22
[patent_title] => 'Method and system for improving access latency of multiple bank devices'
[patent_app_type] => new
[patent_app_number] => 10/615384
[patent_app_country] => US
[patent_app_date] => 2003-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6580
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0076/20040076044.pdf
[firstpage_image] =>[orig_patent_app_number] => 10615384
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/615384 | Method and system for improving access latency of multiple bank devices | Jul 8, 2003 | Abandoned |
Array
(
[id] => 7091549
[patent_doc_number] => 20050010616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-13
[patent_title] => 'System and method for restoring files'
[patent_app_type] => utility
[patent_app_number] => 10/615626
[patent_app_country] => US
[patent_app_date] => 2003-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3763
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20050010616.pdf
[firstpage_image] =>[orig_patent_app_number] => 10615626
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/615626 | System and method for restoring files | Jul 8, 2003 | Abandoned |
Array
(
[id] => 675965
[patent_doc_number] => 07093082
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-15
[patent_title] => 'Microprogrammable SDRAM memory interface controller'
[patent_app_type] => utility
[patent_app_number] => 10/458999
[patent_app_country] => US
[patent_app_date] => 2003-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5641
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/093/07093082.pdf
[firstpage_image] =>[orig_patent_app_number] => 10458999
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/458999 | Microprogrammable SDRAM memory interface controller | Jun 10, 2003 | Issued |
Array
(
[id] => 7138481
[patent_doc_number] => 20040044867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Personalized digital data processing system'
[patent_app_type] => new
[patent_app_number] => 10/452581
[patent_app_country] => US
[patent_app_date] => 2003-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1645
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20040044867.pdf
[firstpage_image] =>[orig_patent_app_number] => 10452581
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/452581 | Personalized digital data processing system | Jun 2, 2003 | Abandoned |
Array
(
[id] => 534324
[patent_doc_number] => 07194581
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-20
[patent_title] => 'Memory channel with hot add/remove'
[patent_app_type] => utility
[patent_app_number] => 10/454399
[patent_app_country] => US
[patent_app_date] => 2003-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 25
[patent_no_of_words] => 12096
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/194/07194581.pdf
[firstpage_image] =>[orig_patent_app_number] => 10454399
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/454399 | Memory channel with hot add/remove | Jun 2, 2003 | Issued |
Array
(
[id] => 609482
[patent_doc_number] => 07155576
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-12-26
[patent_title] => 'Pre-fetching and invalidating packet information in a cache memory'
[patent_app_type] => utility
[patent_app_number] => 10/446021
[patent_app_country] => US
[patent_app_date] => 2003-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8978
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/155/07155576.pdf
[firstpage_image] =>[orig_patent_app_number] => 10446021
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/446021 | Pre-fetching and invalidating packet information in a cache memory | May 26, 2003 | Issued |