
David M. Naff
Examiner (ID: 17107)
| Most Active Art Unit | 1651 |
| Art Unit(s) | 1802, 1651, 1207, 1302, 1657, 1643, 1808, 1208, 1803, 2899 |
| Total Applications | 2218 |
| Issued Applications | 1396 |
| Pending Applications | 143 |
| Abandoned Applications | 679 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17630773
[patent_doc_number] => 20220165788
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => NANOROD LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/532290
[patent_app_country] => US
[patent_app_date] => 2021-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9213
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532290
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/532290 | Nanorod light emitting diode and method of fabricating the same | Nov 21, 2021 | Issued |
Array
(
[id] => 18600205
[patent_doc_number] => 20230275006
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => SEMICONDUCTOR APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/006695
[patent_app_country] => US
[patent_app_date] => 2021-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9066
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18006695
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/006695 | Semiconductor apparatus | Nov 17, 2021 | Issued |
Array
(
[id] => 17709040
[patent_doc_number] => 20220209048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => HIGH-VOLTAGE LIGHT-EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/530205
[patent_app_country] => US
[patent_app_date] => 2021-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530205
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/530205 | High-voltage light-emitting device | Nov 17, 2021 | Issued |
Array
(
[id] => 17752724
[patent_doc_number] => 20220230929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-21
[patent_title] => SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 17/455114
[patent_app_country] => US
[patent_app_date] => 2021-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4769
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455114
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/455114 | Semiconductor module | Nov 15, 2021 | Issued |
Array
(
[id] => 18379810
[patent_doc_number] => 20230154899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => DISAGGREGATED TRANSISTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/526874
[patent_app_country] => US
[patent_app_date] => 2021-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17526874
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/526874 | Disaggregated transistor devices | Nov 14, 2021 | Issued |
Array
(
[id] => 18874730
[patent_doc_number] => 11862553
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/454888
[patent_app_country] => US
[patent_app_date] => 2021-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4461
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454888
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/454888 | Semiconductor device | Nov 14, 2021 | Issued |
Array
(
[id] => 18361339
[patent_doc_number] => 20230142930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => COMPACT POWER MODULE
[patent_app_type] => utility
[patent_app_number] => 17/524690
[patent_app_country] => US
[patent_app_date] => 2021-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8833
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17524690
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/524690 | Compact power module | Nov 10, 2021 | Issued |
Array
(
[id] => 18387426
[patent_doc_number] => 11658221
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-23
[patent_title] => Backside contact structures and fabrication for metal on both sides of devices
[patent_app_type] => utility
[patent_app_number] => 17/522764
[patent_app_country] => US
[patent_app_date] => 2021-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 64
[patent_no_of_words] => 9205
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522764
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/522764 | Backside contact structures and fabrication for metal on both sides of devices | Nov 8, 2021 | Issued |
Array
(
[id] => 20649584
[patent_doc_number] => 12604547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-14
[patent_title] => Reduced flicker noise transistor layout
[patent_app_type] => utility
[patent_app_number] => 17/522114
[patent_app_country] => US
[patent_app_date] => 2021-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 0
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522114
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/522114 | Reduced flicker noise transistor layout | Nov 8, 2021 | Issued |
Array
(
[id] => 17431658
[patent_doc_number] => 20220059367
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-24
[patent_title] => HIGH DENSITY ORGANIC INTERCONNECT STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 17/521406
[patent_app_country] => US
[patent_app_date] => 2021-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7383
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521406
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/521406 | High density organic interconnect structures | Nov 7, 2021 | Issued |
Array
(
[id] => 18304460
[patent_doc_number] => 11626374
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-04-11
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/519682
[patent_app_country] => US
[patent_app_date] => 2021-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 10570
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17519682
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/519682 | Semiconductor device | Nov 4, 2021 | Issued |
Array
(
[id] => 18249033
[patent_doc_number] => 11605631
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-14
[patent_title] => 3D semiconductor structure and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/516721
[patent_app_country] => US
[patent_app_date] => 2021-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4797
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17516721
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/516721 | 3D semiconductor structure and method of fabricating the same | Nov 1, 2021 | Issued |
Array
(
[id] => 18528737
[patent_doc_number] => 11715741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-01
[patent_title] => Semiconductor device and method for manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/512855
[patent_app_country] => US
[patent_app_date] => 2021-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 81
[patent_no_of_words] => 45185
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512855
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/512855 | Semiconductor device and method for manufacturing semiconductor device | Oct 27, 2021 | Issued |
Array
(
[id] => 18919149
[patent_doc_number] => 11881437
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-23
[patent_title] => Embedded package with electrically isolating dielectric liner
[patent_app_type] => utility
[patent_app_number] => 17/511787
[patent_app_country] => US
[patent_app_date] => 2021-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 7036
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511787
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/511787 | Embedded package with electrically isolating dielectric liner | Oct 26, 2021 | Issued |
Array
(
[id] => 17900834
[patent_doc_number] => 20220310496
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/509224
[patent_app_country] => US
[patent_app_date] => 2021-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14278
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509224
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/509224 | Semiconductor package and method of fabricating the same | Oct 24, 2021 | Issued |
Array
(
[id] => 17389615
[patent_doc_number] => 20220037467
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-03
[patent_title] => METHOD OF MANUFACTURING CHANNEL ALL-AROUND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/503380
[patent_app_country] => US
[patent_app_date] => 2021-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10363
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503380
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/503380 | Method of manufacturing channel all-around semiconductor device | Oct 17, 2021 | Issued |
Array
(
[id] => 18061779
[patent_doc_number] => 20220392866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-08
[patent_title] => SEMICONDUCTOR DIE STACK HAVING BENT WIRES AND VERTICAL WIRES AND A SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR DIE STACK
[patent_app_type] => utility
[patent_app_number] => 17/497368
[patent_app_country] => US
[patent_app_date] => 2021-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5794
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497368
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/497368 | Semiconductor die stack having bent wires and vertical wires and a semiconductor package including the semiconductor die stack | Oct 7, 2021 | Issued |
Array
(
[id] => 17599425
[patent_doc_number] => 20220148999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-12
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/488421
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9172
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488421
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/488421 | SEMICONDUCTOR DEVICE | Sep 28, 2021 | Abandoned |
Array
(
[id] => 18562978
[patent_doc_number] => 11728231
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-15
[patent_title] => Semiconductor module
[patent_app_type] => utility
[patent_app_number] => 17/486990
[patent_app_country] => US
[patent_app_date] => 2021-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6951
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486990
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/486990 | Semiconductor module | Sep 27, 2021 | Issued |
Array
(
[id] => 18310263
[patent_doc_number] => 20230114163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => INNER SPACER FORMATION FOR NANOSHEET TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 17/485765
[patent_app_country] => US
[patent_app_date] => 2021-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485765
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/485765 | Inner spacer formation for nanosheet transistors | Sep 26, 2021 | Issued |