
David M. Ostrowski
Examiner (ID: 18512)
| Most Active Art Unit | 2508 |
| Art Unit(s) | 2814, 2899, 2508 |
| Total Applications | 439 |
| Issued Applications | 348 |
| Pending Applications | 12 |
| Abandoned Applications | 79 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3837196
[patent_doc_number] => 05814881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-29
[patent_title] => 'Stacked integrated chip package and method of making same'
[patent_app_type] => 1
[patent_app_number] => 8/770872
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2563
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/814/05814881.pdf
[firstpage_image] =>[orig_patent_app_number] => 770872
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/770872 | Stacked integrated chip package and method of making same | Dec 19, 1996 | Issued |
Array
(
[id] => 3782266
[patent_doc_number] => 05818101
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Arrangement for the protection of electrical and electronic components against electrostatic discharge'
[patent_app_type] => 1
[patent_app_number] => 8/767030
[patent_app_country] => US
[patent_app_date] => 1996-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1539
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/818/05818101.pdf
[firstpage_image] =>[orig_patent_app_number] => 767030
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/767030 | Arrangement for the protection of electrical and electronic components against electrostatic discharge | Dec 11, 1996 | Issued |
Array
(
[id] => 3766955
[patent_doc_number] => 05844309
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Adhesive composition, semiconductor device using the composition and method for producing a semiconductor device using the composition'
[patent_app_type] => 1
[patent_app_number] => 8/754061
[patent_app_country] => US
[patent_app_date] => 1996-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 36128
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844309.pdf
[firstpage_image] =>[orig_patent_app_number] => 754061
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754061 | Adhesive composition, semiconductor device using the composition and method for producing a semiconductor device using the composition | Dec 2, 1996 | Issued |
Array
(
[id] => 3864958
[patent_doc_number] => 05793098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-11
[patent_title] => 'Package including conductive layers having notches formed'
[patent_app_type] => 1
[patent_app_number] => 8/755014
[patent_app_country] => US
[patent_app_date] => 1996-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 2070
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/793/05793098.pdf
[firstpage_image] =>[orig_patent_app_number] => 755014
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/755014 | Package including conductive layers having notches formed | Nov 21, 1996 | Issued |
Array
(
[id] => 3812660
[patent_doc_number] => 05831331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Self-shielding inductor for multi-layer semiconductor integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/754346
[patent_app_country] => US
[patent_app_date] => 1996-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4431
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831331.pdf
[firstpage_image] =>[orig_patent_app_number] => 754346
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754346 | Self-shielding inductor for multi-layer semiconductor integrated circuits | Nov 21, 1996 | Issued |
Array
(
[id] => 3845311
[patent_doc_number] => 05847448
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Method and device for interconnecting integrated circuits in three dimensions'
[patent_app_type] => 1
[patent_app_number] => 8/749660
[patent_app_country] => US
[patent_app_date] => 1996-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 2568
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/847/05847448.pdf
[firstpage_image] =>[orig_patent_app_number] => 749660
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/749660 | Method and device for interconnecting integrated circuits in three dimensions | Nov 14, 1996 | Issued |
Array
(
[id] => 3732940
[patent_doc_number] => 05703397
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-30
[patent_title] => 'Semiconductor package having an aluminum nitride substrate'
[patent_app_type] => 1
[patent_app_number] => 8/745367
[patent_app_country] => US
[patent_app_date] => 1996-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 11266
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/703/05703397.pdf
[firstpage_image] =>[orig_patent_app_number] => 745367
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/745367 | Semiconductor package having an aluminum nitride substrate | Nov 7, 1996 | Issued |
Array
(
[id] => 3933394
[patent_doc_number] => 05877553
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-02
[patent_title] => 'Metallic electronic component packaging arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/739662
[patent_app_country] => US
[patent_app_date] => 1996-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3595
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/877/05877553.pdf
[firstpage_image] =>[orig_patent_app_number] => 739662
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/739662 | Metallic electronic component packaging arrangement | Oct 30, 1996 | Issued |
Array
(
[id] => 3750927
[patent_doc_number] => 05717253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-10
[patent_title] => 'Structure for forming an improved quality silicidation layer'
[patent_app_type] => 1
[patent_app_number] => 8/736490
[patent_app_country] => US
[patent_app_date] => 1996-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 1849
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/717/05717253.pdf
[firstpage_image] =>[orig_patent_app_number] => 736490
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/736490 | Structure for forming an improved quality silicidation layer | Oct 23, 1996 | Issued |
Array
(
[id] => 3692175
[patent_doc_number] => 05691549
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Sidewall strap'
[patent_app_type] => 1
[patent_app_number] => 8/720991
[patent_app_country] => US
[patent_app_date] => 1996-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 3532
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/691/05691549.pdf
[firstpage_image] =>[orig_patent_app_number] => 720991
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/720991 | Sidewall strap | Oct 14, 1996 | Issued |
Array
(
[id] => 4054555
[patent_doc_number] => 05869901
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Semiconductor device having aluminum interconnection and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/730598
[patent_app_country] => US
[patent_app_date] => 1996-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 37
[patent_no_of_words] => 13004
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/869/05869901.pdf
[firstpage_image] =>[orig_patent_app_number] => 730598
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/730598 | Semiconductor device having aluminum interconnection and method of manufacturing the same | Oct 14, 1996 | Issued |
Array
(
[id] => 3880340
[patent_doc_number] => 05825081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Tape carrier and assembly structure thereof'
[patent_app_type] => 1
[patent_app_number] => 8/729420
[patent_app_country] => US
[patent_app_date] => 1996-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 4644
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/825/05825081.pdf
[firstpage_image] =>[orig_patent_app_number] => 729420
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/729420 | Tape carrier and assembly structure thereof | Oct 10, 1996 | Issued |
Array
(
[id] => 3904016
[patent_doc_number] => 05751057
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Lead on chip lead frame design without jumpover wiring'
[patent_app_type] => 1
[patent_app_number] => 8/728534
[patent_app_country] => US
[patent_app_date] => 1996-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2847
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/751/05751057.pdf
[firstpage_image] =>[orig_patent_app_number] => 728534
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/728534 | Lead on chip lead frame design without jumpover wiring | Oct 8, 1996 | Issued |
Array
(
[id] => 3794626
[patent_doc_number] => 05841178
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Optical component package'
[patent_app_type] => 1
[patent_app_number] => 8/720888
[patent_app_country] => US
[patent_app_date] => 1996-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 1702
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/841/05841178.pdf
[firstpage_image] =>[orig_patent_app_number] => 720888
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/720888 | Optical component package | Oct 3, 1996 | Issued |
Array
(
[id] => 3880450
[patent_doc_number] => 05825089
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Low thermal resistance spring biased RF semiconductor package mounting structure'
[patent_app_type] => 1
[patent_app_number] => 8/722698
[patent_app_country] => US
[patent_app_date] => 1996-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 1836
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/825/05825089.pdf
[firstpage_image] =>[orig_patent_app_number] => 722698
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/722698 | Low thermal resistance spring biased RF semiconductor package mounting structure | Sep 29, 1996 | Issued |
| 08/720430 | SEMICONDUCTOR DEVICE | Sep 29, 1996 | Abandoned |
| 08/720262 | ELECTRICALLY CONDUCTIVE THERMAL INTERFACE | Sep 25, 1996 | Abandoned |
Array
(
[id] => 3692492
[patent_doc_number] => 05691570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Integrated circuits having patterns of mirror images and packages incorporating the same'
[patent_app_type] => 1
[patent_app_number] => 8/719336
[patent_app_country] => US
[patent_app_date] => 1996-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 25
[patent_no_of_words] => 5645
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/691/05691570.pdf
[firstpage_image] =>[orig_patent_app_number] => 719336
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/719336 | Integrated circuits having patterns of mirror images and packages incorporating the same | Sep 24, 1996 | Issued |
Array
(
[id] => 3766749
[patent_doc_number] => 05852327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/709592
[patent_app_country] => US
[patent_app_date] => 1996-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 58
[patent_no_of_words] => 10813
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/852/05852327.pdf
[firstpage_image] =>[orig_patent_app_number] => 709592
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/709592 | Semiconductor device | Sep 8, 1996 | Issued |
Array
(
[id] => 3818234
[patent_doc_number] => 05710459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-20
[patent_title] => 'Integrated circuit package provided with multiple heat-conducting paths for enhancing heat dissipation and wrapping around cap for improving integrity and reliability'
[patent_app_type] => 1
[patent_app_number] => 8/689534
[patent_app_country] => US
[patent_app_date] => 1996-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2602
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/710/05710459.pdf
[firstpage_image] =>[orig_patent_app_number] => 689534
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/689534 | Integrated circuit package provided with multiple heat-conducting paths for enhancing heat dissipation and wrapping around cap for improving integrity and reliability | Aug 8, 1996 | Issued |