| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3776374
[patent_doc_number] => 05773895
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-30
[patent_title] => 'Anchor provisions to prevent mold delamination in an overmolded plastic array package'
[patent_app_type] => 1
[patent_app_number] => 8/627058
[patent_app_country] => US
[patent_app_date] => 1996-04-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/773/05773895.pdf
[firstpage_image] =>[orig_patent_app_number] => 627058
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/627058 | Anchor provisions to prevent mold delamination in an overmolded plastic array package | Apr 2, 1996 | Issued |
Array
(
[id] => 3791161
[patent_doc_number] => 05736786
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Power module with silicon dice oriented for improved reliability'
[patent_app_type] => 1
[patent_app_number] => 8/625826
[patent_app_country] => US
[patent_app_date] => 1996-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/736/05736786.pdf
[firstpage_image] =>[orig_patent_app_number] => 625826
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/625826 | Power module with silicon dice oriented for improved reliability | Mar 31, 1996 | Issued |
Array
(
[id] => 3862209
[patent_doc_number] => 05705856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-06
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/623990
[patent_app_country] => US
[patent_app_date] => 1996-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
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[patent_words_short_claim] => 127
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[pdf_file] => patents/05/705/05705856.pdf
[firstpage_image] =>[orig_patent_app_number] => 623990
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/623990 | Semiconductor device | Mar 28, 1996 | Issued |
Array
(
[id] => 3692434
[patent_doc_number] => 05691566
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Tapered three-wire line vertical connections'
[patent_app_type] => 1
[patent_app_number] => 8/621670
[patent_app_country] => US
[patent_app_date] => 1996-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
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[patent_no_of_claims] => 16
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[patent_maintenance] => 1
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[pdf_file] => patents/05/691/05691566.pdf
[firstpage_image] =>[orig_patent_app_number] => 621670
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/621670 | Tapered three-wire line vertical connections | Mar 24, 1996 | Issued |
Array
(
[id] => 3702477
[patent_doc_number] => 05677576
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Chip sized semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/618807
[patent_app_country] => US
[patent_app_date] => 1996-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3443
[patent_no_of_claims] => 12
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[patent_maintenance] => 1
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[pdf_file] => patents/05/677/05677576.pdf
[firstpage_image] =>[orig_patent_app_number] => 618807
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/618807 | Chip sized semiconductor device | Mar 19, 1996 | Issued |
| 08/616472 | ADHESIVE COMPOSITION, SEMICONDUCTOR DEVICE USING THE COMPOSITION AND METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE USING THE COMPOSITION | Mar 18, 1996 | Abandoned |
Array
(
[id] => 3750885
[patent_doc_number] => 05717250
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-10
[patent_title] => 'Sputter and CVD deposited titanium nitride barrier layer between a platinum layer and a polysilicon plug'
[patent_app_type] => 1
[patent_app_number] => 8/614798
[patent_app_country] => US
[patent_app_date] => 1996-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/717/05717250.pdf
[firstpage_image] =>[orig_patent_app_number] => 614798
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/614798 | Sputter and CVD deposited titanium nitride barrier layer between a platinum layer and a polysilicon plug | Mar 6, 1996 | Issued |
| 08/605834 | SEMICONDUCTOR DEVICE IN WHICH SEMICONDUCTOR CHIP HAS BOTTOM SURFACE WITH REDUCED LEVEL OF ORGANIC COMPOUNDS RELATIVELY TO OTHER SURFACES THEREOF | Feb 21, 1996 | Abandoned |
Array
(
[id] => 3836034
[patent_doc_number] => 05739587
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Semiconductor device having a multi-latered wiring structure'
[patent_app_type] => 1
[patent_app_number] => 8/603166
[patent_app_country] => US
[patent_app_date] => 1996-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
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[patent_no_of_words] => 4087
[patent_no_of_claims] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/739/05739587.pdf
[firstpage_image] =>[orig_patent_app_number] => 603166
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/603166 | Semiconductor device having a multi-latered wiring structure | Feb 19, 1996 | Issued |
Array
(
[id] => 3879509
[patent_doc_number] => 05763950
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Semiconductor element cooling apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/598331
[patent_app_country] => US
[patent_app_date] => 1996-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 59
[patent_no_of_words] => 12592
[patent_no_of_claims] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/763/05763950.pdf
[firstpage_image] =>[orig_patent_app_number] => 598331
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/598331 | Semiconductor element cooling apparatus | Feb 7, 1996 | Issued |
Array
(
[id] => 3834776
[patent_doc_number] => 05760465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Electronic package with strain relief means'
[patent_app_type] => 1
[patent_app_number] => 8/595108
[patent_app_country] => US
[patent_app_date] => 1996-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/760/05760465.pdf
[firstpage_image] =>[orig_patent_app_number] => 595108
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/595108 | Electronic package with strain relief means | Jan 31, 1996 | Issued |
| 08/590392 | LEAD FRAME WITH CIRCULAR LEAD TIP LAYOUT AND IMPROVED ASSEMBLY | Jan 24, 1996 | Abandoned |
Array
(
[id] => 3733056
[patent_doc_number] => 05703405
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-30
[patent_title] => 'Integrated circuit chip formed from processing two opposing surfaces of a wafer'
[patent_app_type] => 1
[patent_app_number] => 8/591194
[patent_app_country] => US
[patent_app_date] => 1996-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/703/05703405.pdf
[firstpage_image] =>[orig_patent_app_number] => 591194
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/591194 | Integrated circuit chip formed from processing two opposing surfaces of a wafer | Jan 15, 1996 | Issued |
Array
(
[id] => 3864988
[patent_doc_number] => 05793100
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-11
[patent_title] => 'Lead frame for semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/584124
[patent_app_country] => US
[patent_app_date] => 1996-01-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/793/05793100.pdf
[firstpage_image] =>[orig_patent_app_number] => 584124
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/584124 | Lead frame for semiconductor device | Jan 10, 1996 | Issued |
Array
(
[id] => 3626716
[patent_doc_number] => 05594274
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[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Lead frame for use in a semiconductor device and method of manufacturing the semiconductor device using the same'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/587825 | Lead frame for use in a semiconductor device and method of manufacturing the semiconductor device using the same | Jan 10, 1996 | Issued |
Array
(
[id] => 3727842
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[patent_kind] => NA
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[patent_title] => 'Substrate for semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 583542
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583542 | Substrate for semiconductor device | Jan 4, 1996 | Issued |
Array
(
[id] => 3837347
[patent_doc_number] => 05814891
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[patent_kind] => NA
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[patent_title] => 'Flip-chip connecting type semiconductor device'
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[patent_app_date] => 1996-01-03
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[pdf_file] => patents/05/814/05814891.pdf
[firstpage_image] =>[orig_patent_app_number] => 582580
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/582580 | Flip-chip connecting type semiconductor device | Jan 2, 1996 | Issued |
Array
(
[id] => 3733197
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[patent_kind] => NA
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[patent_title] => 'Integrated circuit package with internally readable permanent identification of device characteristics'
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[pdf_file] => patents/05/670/05670825.pdf
[firstpage_image] =>[orig_patent_app_number] => 580750
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580750 | Integrated circuit package with internally readable permanent identification of device characteristics | Dec 28, 1995 | Issued |
Array
(
[id] => 3624667
[patent_doc_number] => 05614759
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-25
[patent_title] => 'Automated assembly of semiconductor devices using a pair of lead frames'
[patent_app_type] => 1
[patent_app_number] => 8/579232
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[patent_app_date] => 1995-12-28
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[pdf_file] => patents/05/614/05614759.pdf
[firstpage_image] =>[orig_patent_app_number] => 579232
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579232 | Automated assembly of semiconductor devices using a pair of lead frames | Dec 27, 1995 | Issued |
Array
(
[id] => 3820954
[patent_doc_number] => 05789810
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Semiconductor cap'
[patent_app_type] => 1
[patent_app_number] => 8/576104
[patent_app_country] => US
[patent_app_date] => 1995-12-21
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[pdf_file] => patents/05/789/05789810.pdf
[firstpage_image] =>[orig_patent_app_number] => 576104
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/576104 | Semiconductor cap | Dec 20, 1995 | Issued |