Search

David Nhu

Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )

Most Active Art Unit
2818
Art Unit(s)
2895, 2818, 2817
Total Applications
2355
Issued Applications
2255
Pending Applications
12
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6090842 [patent_doc_number] => 20110001177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING CAPACITOR AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/880574 [patent_app_country] => US [patent_app_date] => 2010-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 64 [patent_no_of_words] => 27925 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001177.pdf [firstpage_image] =>[orig_patent_app_number] => 12880574 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/880574
Semiconductor device comprising capacitor and method of fabricating the same Sep 12, 2010 Issued
Array ( [id] => 9009304 [patent_doc_number] => 08524602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Method for forming vias in a substrate' [patent_app_type] => utility [patent_app_number] => 12/876721 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 2366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12876721 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/876721
Method for forming vias in a substrate Sep 6, 2010 Issued
Array ( [id] => 8797567 [patent_doc_number] => 08436439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure' [patent_app_type] => utility [patent_app_number] => 12/871401 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7249 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12871401 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871401
Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure Aug 29, 2010 Issued
Array ( [id] => 6570725 [patent_doc_number] => 20100320534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'Structure and Method for Forming a Thick Bottom Dielectric (TBD) for Trench-Gate Devices' [patent_app_type] => utility [patent_app_number] => 12/870600 [patent_app_country] => US [patent_app_date] => 2010-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6109 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20100320534.pdf [firstpage_image] =>[orig_patent_app_number] => 12870600 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/870600
Structure related to a thick bottom dielectric (TBD) for trench-gate devices Aug 26, 2010 Issued
Array ( [id] => 6610025 [patent_doc_number] => 20100323500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'System and Process for Producing Nanowire Composites and Electronic Substrates Therefrom' [patent_app_type] => utility [patent_app_number] => 12/854323 [patent_app_country] => US [patent_app_date] => 2010-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 17222 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323500.pdf [firstpage_image] =>[orig_patent_app_number] => 12854323 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/854323
System and Process for Producing Nanowire Composites and Electronic Substrates Therefrom Aug 10, 2010 Abandoned
Array ( [id] => 8802810 [patent_doc_number] => 08441085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Method of manufacturing electronic apparatus and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 12/849675 [patent_app_country] => US [patent_app_date] => 2010-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 13390 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12849675 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/849675
Method of manufacturing electronic apparatus and electronic apparatus Aug 2, 2010 Issued
Array ( [id] => 8701492 [patent_doc_number] => 08394714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Anti-reflective coatings for micro-fluid applications' [patent_app_type] => utility [patent_app_number] => 12/847494 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1844 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847494 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/847494
Anti-reflective coatings for micro-fluid applications Jul 29, 2010 Issued
Array ( [id] => 8909331 [patent_doc_number] => 08481393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/844224 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 115 [patent_no_of_words] => 53351 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12844224 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844224
Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device Jul 26, 2010 Issued
Array ( [id] => 8784597 [patent_doc_number] => 08431440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Chip manufacturing method' [patent_app_type] => utility [patent_app_number] => 12/801595 [patent_app_country] => US [patent_app_date] => 2010-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6088 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12801595 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801595
Chip manufacturing method Jun 15, 2010 Issued
Array ( [id] => 8578090 [patent_doc_number] => 08344300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Device to reduce shadowing during radiative heating of a substrate' [patent_app_type] => utility [patent_app_number] => 12/815261 [patent_app_country] => US [patent_app_date] => 2010-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12815261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/815261
Device to reduce shadowing during radiative heating of a substrate Jun 13, 2010 Issued
Array ( [id] => 8834366 [patent_doc_number] => 08450122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Test structures and methods' [patent_app_type] => utility [patent_app_number] => 12/792406 [patent_app_country] => US [patent_app_date] => 2010-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7830 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792406
Test structures and methods Jun 1, 2010 Issued
Array ( [id] => 8713794 [patent_doc_number] => 08399936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Through substrate via semiconductor components' [patent_app_type] => utility [patent_app_number] => 12/790220 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 6457 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12790220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/790220
Through substrate via semiconductor components May 27, 2010 Issued
Array ( [id] => 8386647 [patent_doc_number] => 08264047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Semiconductor component with a trench edge termination' [patent_app_type] => utility [patent_app_number] => 12/776866 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6587 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776866 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776866
Semiconductor component with a trench edge termination May 9, 2010 Issued
Array ( [id] => 7558888 [patent_doc_number] => 20110272719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'LED STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/776834 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3097 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272719.pdf [firstpage_image] =>[orig_patent_app_number] => 12776834 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776834
LED structure May 9, 2010 Issued
Array ( [id] => 8294869 [patent_doc_number] => 08222651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/776376 [patent_app_country] => US [patent_app_date] => 2010-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 48 [patent_no_of_words] => 9552 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776376 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776376
Semiconductor device May 7, 2010 Issued
Array ( [id] => 6556798 [patent_doc_number] => 20100289094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'ENHANCING DEPOSITION UNIFORMITY OF A CHANNEL SEMICONDUCTOR ALLOY BY AN IN SITU ETCH PROCESS' [patent_app_type] => utility [patent_app_number] => 12/775863 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7848 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20100289094.pdf [firstpage_image] =>[orig_patent_app_number] => 12775863 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775863
Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process May 6, 2010 Issued
Array ( [id] => 7558891 [patent_doc_number] => 20110272722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'ENCAPSULATION STRUCTURE FOR LIGHT-EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 12/775972 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1517 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272722.pdf [firstpage_image] =>[orig_patent_app_number] => 12775972 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/775972
ENCAPSULATION STRUCTURE FOR LIGHT-EMITTING DIODE May 6, 2010 Abandoned
Array ( [id] => 7558983 [patent_doc_number] => 20110272814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'METHOD FOR ATTACHING WIDE BUS MEMORY AND SERIAL MEMORY TO A PROCESSOR WITHIN A CHIP SCALE PACKAGE FOOTPRINT' [patent_app_type] => utility [patent_app_number] => 12/776302 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3439 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272814.pdf [firstpage_image] =>[orig_patent_app_number] => 12776302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776302
Method for attaching wide bus memory and serial memory to a processor within a chip scale package footprint May 6, 2010 Issued
Array ( [id] => 8198508 [patent_doc_number] => 20120122266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'POROUS LIFT-OFF LAYER FOR SELECTIVE REMOVAL OF DEPOSITED FILMS' [patent_app_type] => utility [patent_app_number] => 13/318971 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8645 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20120122266.pdf [firstpage_image] =>[orig_patent_app_number] => 13318971 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/318971
Porous lift-off layer for selective removal of deposited films May 6, 2010 Issued
Array ( [id] => 8147106 [patent_doc_number] => 08164125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/800096 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2471 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/164/08164125.pdf [firstpage_image] =>[orig_patent_app_number] => 12800096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/800096
Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit May 6, 2010 Issued
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