
David Nhu
Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2895, 2818, 2817 |
| Total Applications | 2355 |
| Issued Applications | 2255 |
| Pending Applications | 12 |
| Abandoned Applications | 91 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6090842
[patent_doc_number] => 20110001177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-06
[patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING CAPACITOR AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/880574
[patent_app_country] => US
[patent_app_date] => 2010-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 64
[patent_figures_cnt] => 64
[patent_no_of_words] => 27925
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20110001177.pdf
[firstpage_image] =>[orig_patent_app_number] => 12880574
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/880574 | Semiconductor device comprising capacitor and method of fabricating the same | Sep 12, 2010 | Issued |
Array
(
[id] => 9009304
[patent_doc_number] => 08524602
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-03
[patent_title] => 'Method for forming vias in a substrate'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/876721 | Method for forming vias in a substrate | Sep 6, 2010 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure'
[patent_app_type] => utility
[patent_app_number] => 12/871401
[patent_app_country] => US
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Array
(
[id] => 6570725
[patent_doc_number] => 20100320534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-23
[patent_title] => 'Structure and Method for Forming a Thick Bottom Dielectric (TBD) for Trench-Gate Devices'
[patent_app_type] => utility
[patent_app_number] => 12/870600
[patent_app_country] => US
[patent_app_date] => 2010-08-27
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/870600 | Structure related to a thick bottom dielectric (TBD) for trench-gate devices | Aug 26, 2010 | Issued |
Array
(
[id] => 6610025
[patent_doc_number] => 20100323500
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[patent_title] => 'System and Process for Producing Nanowire Composites and Electronic Substrates Therefrom'
[patent_app_type] => utility
[patent_app_number] => 12/854323
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Array
(
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[patent_issue_date] => 2013-05-14
[patent_title] => 'Method of manufacturing electronic apparatus and electronic apparatus'
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Array
(
[id] => 8701492
[patent_doc_number] => 08394714
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[patent_issue_date] => 2013-03-12
[patent_title] => 'Anti-reflective coatings for micro-fluid applications'
[patent_app_type] => utility
[patent_app_number] => 12/847494
[patent_app_country] => US
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Array
(
[id] => 8909331
[patent_doc_number] => 08481393
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-09
[patent_title] => 'Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/844224
[patent_app_country] => US
[patent_app_date] => 2010-07-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/844224 | Semiconductor substrate and method for manufacturing the same, and method for manufacturing semiconductor device | Jul 26, 2010 | Issued |
Array
(
[id] => 8784597
[patent_doc_number] => 08431440
[patent_country] => US
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[patent_issue_date] => 2013-04-30
[patent_title] => 'Chip manufacturing method'
[patent_app_type] => utility
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Array
(
[id] => 8578090
[patent_doc_number] => 08344300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-01
[patent_title] => 'Device to reduce shadowing during radiative heating of a substrate'
[patent_app_type] => utility
[patent_app_number] => 12/815261
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[patent_app_date] => 2010-06-14
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Array
(
[id] => 8834366
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[patent_kind] => B2
[patent_issue_date] => 2013-05-28
[patent_title] => 'Test structures and methods'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/792406 | Test structures and methods | Jun 1, 2010 | Issued |
Array
(
[id] => 8713794
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[patent_kind] => B2
[patent_issue_date] => 2013-03-19
[patent_title] => 'Through substrate via semiconductor components'
[patent_app_type] => utility
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Array
(
[id] => 8386647
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[patent_title] => 'Semiconductor component with a trench edge termination'
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Array
(
[id] => 7558888
[patent_doc_number] => 20110272719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-10
[patent_title] => 'LED STRUCTURE'
[patent_app_type] => utility
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Array
(
[id] => 8294869
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[patent_title] => 'Semiconductor device'
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Array
(
[id] => 6556798
[patent_doc_number] => 20100289094
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[patent_title] => 'ENHANCING DEPOSITION UNIFORMITY OF A CHANNEL SEMICONDUCTOR ALLOY BY AN IN SITU ETCH PROCESS'
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Array
(
[id] => 7558891
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Array
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[patent_title] => 'METHOD FOR ATTACHING WIDE BUS MEMORY AND SERIAL MEMORY TO A PROCESSOR WITHIN A CHIP SCALE PACKAGE FOOTPRINT'
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Array
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Array
(
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