Search

David Nhu

Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )

Most Active Art Unit
2818
Art Unit(s)
2895, 2818, 2817
Total Applications
2355
Issued Applications
2255
Pending Applications
12
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6215197 [patent_doc_number] => 20100051609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Directional Solidification of Silicon by Electric Induction Susceptor Heating in a Controlled Environment' [patent_app_type] => utility [patent_app_number] => 12/550097 [patent_app_country] => US [patent_app_date] => 2009-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1834 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20100051609.pdf [firstpage_image] =>[orig_patent_app_number] => 12550097 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/550097
Directional solidification of silicon by electric induction susceptor heating in a controlled environment Aug 27, 2009 Issued
Array ( [id] => 6623868 [patent_doc_number] => 20100003801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'Method of Manufacturing a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/546064 [patent_app_country] => US [patent_app_date] => 2009-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2700 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20100003801.pdf [firstpage_image] =>[orig_patent_app_number] => 12546064 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/546064
Method of manufacturing a semiconductor device Aug 23, 2009 Issued
Array ( [id] => 5490484 [patent_doc_number] => 20090291555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'Method and Apparatus for Using Flex Circuit Technology to Create a Reference Electrode Channel' [patent_app_type] => utility [patent_app_number] => 12/537031 [patent_app_country] => US [patent_app_date] => 2009-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3498 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20090291555.pdf [firstpage_image] =>[orig_patent_app_number] => 12537031 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/537031
Method and apparatus for using flex circuit technology to create a reference electrode channel Aug 5, 2009 Issued
Array ( [id] => 5485410 [patent_doc_number] => 20090275175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'MODIFIED CHIP ATTACH PROCESS' [patent_app_type] => utility [patent_app_number] => 12/502088 [patent_app_country] => US [patent_app_date] => 2009-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4822 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20090275175.pdf [firstpage_image] =>[orig_patent_app_number] => 12502088 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/502088
Modified chip attach process Jul 12, 2009 Issued
Array ( [id] => 5484118 [patent_doc_number] => 20090273883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'METHOD AND SYSTEM FOR INCORPORATING HIGH VOLTAGE DEVICES IN AN EEPROM' [patent_app_type] => utility [patent_app_number] => 12/501820 [patent_app_country] => US [patent_app_date] => 2009-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20090273883.pdf [firstpage_image] =>[orig_patent_app_number] => 12501820 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/501820
Method and system for incorporating high voltage devices in an EEPROM Jul 12, 2009 Issued
Array ( [id] => 6624390 [patent_doc_number] => 20100311215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A BURIED GATE THAT CAN REALIZE A REDUCTION IN GATE-INDUCED DRAIN LEAKAGE (GIDL) AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/493268 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6215 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20100311215.pdf [firstpage_image] =>[orig_patent_app_number] => 12493268 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493268
Semiconductor device having a buried gate that can realize a reduction in gate-induced drain leakage (GIDL) and method for manufacturing the same Jun 28, 2009 Issued
Array ( [id] => 4604687 [patent_doc_number] => 07985667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Method for patterning semiconductor device having magnetic tunneling junction structure' [patent_app_type] => utility [patent_app_number] => 12/492697 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2625 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/985/07985667.pdf [firstpage_image] =>[orig_patent_app_number] => 12492697 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/492697
Method for patterning semiconductor device having magnetic tunneling junction structure Jun 25, 2009 Issued
Array ( [id] => 6494689 [patent_doc_number] => 20100200948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/493047 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4013 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200948.pdf [firstpage_image] =>[orig_patent_app_number] => 12493047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493047
Semiconductor device and fabrication method thereof Jun 25, 2009 Issued
Array ( [id] => 7545404 [patent_doc_number] => 08053376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'One-step synthesis and patterning of aligned polymer nanowires on a substrate' [patent_app_type] => utility [patent_app_number] => 12/492333 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 18 [patent_no_of_words] => 3747 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053376.pdf [firstpage_image] =>[orig_patent_app_number] => 12492333 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/492333
One-step synthesis and patterning of aligned polymer nanowires on a substrate Jun 25, 2009 Issued
Array ( [id] => 7712060 [patent_doc_number] => 08093119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'CMOS microelectromechanical system (MEMS) device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/490318 [patent_app_country] => US [patent_app_date] => 2009-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 58 [patent_no_of_words] => 9420 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093119.pdf [firstpage_image] =>[orig_patent_app_number] => 12490318 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/490318
CMOS microelectromechanical system (MEMS) device and fabrication method thereof Jun 23, 2009 Issued
Array ( [id] => 6569468 [patent_doc_number] => 20100320436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'ENCAPSULATED PHASE CHANGE CELL STRUCTURES AND METHODS' [patent_app_type] => utility [patent_app_number] => 12/489957 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5041 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20100320436.pdf [firstpage_image] =>[orig_patent_app_number] => 12489957 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/489957
Encapsulated phase change cell structures and methods Jun 22, 2009 Issued
Array ( [id] => 4477096 [patent_doc_number] => 07906439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Method of fabricating a MEMS/NEMS electromechanical component' [patent_app_type] => utility [patent_app_number] => 12/488898 [patent_app_country] => US [patent_app_date] => 2009-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 42 [patent_no_of_words] => 7722 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/906/07906439.pdf [firstpage_image] =>[orig_patent_app_number] => 12488898 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/488898
Method of fabricating a MEMS/NEMS electromechanical component Jun 21, 2009 Issued
Array ( [id] => 4442013 [patent_doc_number] => 07927988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/488577 [patent_app_country] => US [patent_app_date] => 2009-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3109 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/927/07927988.pdf [firstpage_image] =>[orig_patent_app_number] => 12488577 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/488577
Method of fabricating semiconductor device Jun 20, 2009 Issued
Array ( [id] => 4499202 [patent_doc_number] => 07948017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-24 [patent_title] => 'Digital radiography imager with buried interconnect layer in silicon-on-glass and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 12/487678 [patent_app_country] => US [patent_app_date] => 2009-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5618 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/948/07948017.pdf [firstpage_image] =>[orig_patent_app_number] => 12487678 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/487678
Digital radiography imager with buried interconnect layer in silicon-on-glass and method of fabricating same Jun 18, 2009 Issued
Array ( [id] => 6609954 [patent_doc_number] => 20100323494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'NARROW CHANNEL WIDTH EFFECT MODIFICATION IN A SHALLOW TRENCH ISOLATION DEVICE' [patent_app_type] => utility [patent_app_number] => 12/486515 [patent_app_country] => US [patent_app_date] => 2009-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4623 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323494.pdf [firstpage_image] =>[orig_patent_app_number] => 12486515 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/486515
Narrow channel width effect modification in a shallow trench isolation device Jun 16, 2009 Issued
Array ( [id] => 4514316 [patent_doc_number] => 07910486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Method for forming nanotube semiconductor devices' [patent_app_type] => utility [patent_app_number] => 12/484166 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 60 [patent_no_of_words] => 16610 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910486.pdf [firstpage_image] =>[orig_patent_app_number] => 12484166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484166
Method for forming nanotube semiconductor devices Jun 11, 2009 Issued
Array ( [id] => 6384325 [patent_doc_number] => 20100317178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'REMOTE PLASMA PROCESSING OF INTERFACE SURFACES' [patent_app_type] => utility [patent_app_number] => 12/484047 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5194 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0317/20100317178.pdf [firstpage_image] =>[orig_patent_app_number] => 12484047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484047
Remote plasma processing of interface surfaces Jun 11, 2009 Issued
Array ( [id] => 6368741 [patent_doc_number] => 20100314685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'CHARGING PROTECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 12/483737 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314685.pdf [firstpage_image] =>[orig_patent_app_number] => 12483737 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/483737
Charging protection device Jun 11, 2009 Issued
Array ( [id] => 5374273 [patent_doc_number] => 20090311834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'SOI TRANSISTOR WITH SELF-ALIGNED GROUND PLANE AND GATE AND BURIED OXIDE OF VARIABLE THICKNESS' [patent_app_type] => utility [patent_app_number] => 12/483037 [patent_app_country] => US [patent_app_date] => 2009-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6138 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20090311834.pdf [firstpage_image] =>[orig_patent_app_number] => 12483037 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/483037
SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness Jun 10, 2009 Issued
Array ( [id] => 7965933 [patent_doc_number] => 07939437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Metallization method for solar cells' [patent_app_type] => utility [patent_app_number] => 12/482737 [patent_app_country] => US [patent_app_date] => 2009-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2492 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/939/07939437.pdf [firstpage_image] =>[orig_patent_app_number] => 12482737 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/482737
Metallization method for solar cells Jun 10, 2009 Issued
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