Search

David Nhu

Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )

Most Active Art Unit
2818
Art Unit(s)
2895, 2818, 2817
Total Applications
2355
Issued Applications
2255
Pending Applications
12
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5374280 [patent_doc_number] => 20090311841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'Method of Manufacturing a Through-Silicon-Via On-Chip Passive MMW Bandpass Filter' [patent_app_type] => utility [patent_app_number] => 12/140439 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20090311841.pdf [firstpage_image] =>[orig_patent_app_number] => 12140439 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/140439
Method of manufacturing a through-silicon-via on-chip passive MMW bandpass filter Jun 16, 2008 Issued
Array ( [id] => 5349517 [patent_doc_number] => 20090004878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/213137 [patent_app_country] => US [patent_app_date] => 2008-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 30240 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20090004878.pdf [firstpage_image] =>[orig_patent_app_number] => 12213137 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213137
Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device Jun 15, 2008 Issued
Array ( [id] => 4756726 [patent_doc_number] => 20080308951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Semiconductor package and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/157836 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4642 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0308/20080308951.pdf [firstpage_image] =>[orig_patent_app_number] => 12157836 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/157836
Semiconductor package and fabrication method thereof Jun 12, 2008 Abandoned
Array ( [id] => 81648 [patent_doc_number] => 07745349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Method for fabricating semiconductor transistor' [patent_app_type] => utility [patent_app_number] => 12/137650 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1777 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745349.pdf [firstpage_image] =>[orig_patent_app_number] => 12137650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137650
Method for fabricating semiconductor transistor Jun 11, 2008 Issued
Array ( [id] => 4852646 [patent_doc_number] => 20080318389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHOD OF FORMING ALIGNMENT KEY OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/137669 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318389.pdf [firstpage_image] =>[orig_patent_app_number] => 12137669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137669
METHOD OF FORMING ALIGNMENT KEY OF SEMICONDUCTOR DEVICE Jun 11, 2008 Abandoned
Array ( [id] => 4852678 [patent_doc_number] => 20080318421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHODS OF FORMING FILMS OF A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/137059 [patent_app_country] => US [patent_app_date] => 2008-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318421.pdf [firstpage_image] =>[orig_patent_app_number] => 12137059 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/137059
METHODS OF FORMING FILMS OF A SEMICONDUCTOR DEVICE Jun 10, 2008 Abandoned
Array ( [id] => 5364921 [patent_doc_number] => 20090302480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Through Substrate Via Semiconductor Components' [patent_app_type] => utility [patent_app_number] => 12/135059 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6416 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302480.pdf [firstpage_image] =>[orig_patent_app_number] => 12135059 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/135059
Through substrate via semiconductor components Jun 5, 2008 Issued
Array ( [id] => 4613006 [patent_doc_number] => 07989354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Patterning method' [patent_app_type] => utility [patent_app_number] => 12/441754 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 12073 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989354.pdf [firstpage_image] =>[orig_patent_app_number] => 12441754 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/441754
Patterning method Jun 5, 2008 Issued
Array ( [id] => 22167 [patent_doc_number] => 07799626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Lateral DMOS device structure and fabrication method therefor' [patent_app_type] => utility [patent_app_number] => 12/133409 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/799/07799626.pdf [firstpage_image] =>[orig_patent_app_number] => 12133409 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/133409
Lateral DMOS device structure and fabrication method therefor Jun 4, 2008 Issued
Array ( [id] => 7544410 [patent_doc_number] => 08052375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Fluidic sealing for turbomachinery' [patent_app_type] => utility [patent_app_number] => 12/131193 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/052/08052375.pdf [firstpage_image] =>[orig_patent_app_number] => 12131193 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/131193
Fluidic sealing for turbomachinery Jun 1, 2008 Issued
Array ( [id] => 5264998 [patent_doc_number] => 20090117683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Method of manufacturing single crystal substate and method of manufacturing solar cell using the same' [patent_app_type] => utility [patent_app_number] => 12/155156 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3550 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20090117683.pdf [firstpage_image] =>[orig_patent_app_number] => 12155156 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/155156
Method of manufacturing single crystal substate and method of manufacturing solar cell using the same May 29, 2008 Abandoned
Array ( [id] => 14392 [patent_doc_number] => 07808026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Dry etching method and production method of magnetic memory device' [patent_app_type] => utility [patent_app_number] => 12/153848 [patent_app_country] => US [patent_app_date] => 2008-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 31 [patent_no_of_words] => 6834 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808026.pdf [firstpage_image] =>[orig_patent_app_number] => 12153848 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153848
Dry etching method and production method of magnetic memory device May 26, 2008 Issued
Array ( [id] => 5499368 [patent_doc_number] => 20090160056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-25 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/127027 [patent_app_country] => US [patent_app_date] => 2008-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20090160056.pdf [firstpage_image] =>[orig_patent_app_number] => 12127027 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/127027
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME May 26, 2008 Abandoned
Array ( [id] => 4816981 [patent_doc_number] => 20080224240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'ATOMIC LAYER DEPOSITION OF Zrx Hfy Sn1-x-y O2 FILMS AS HIGH k GATE DIELECTRICS' [patent_app_type] => utility [patent_app_number] => 12/126311 [patent_app_country] => US [patent_app_date] => 2008-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10485 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224240.pdf [firstpage_image] =>[orig_patent_app_number] => 12126311 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/126311
Zrx Hfy Sn1-x-y O2 films as high k gate dielectrics May 22, 2008 Issued
Array ( [id] => 4740054 [patent_doc_number] => 20080233707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'Semiconductor device comprising capacitor and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/153763 [patent_app_country] => US [patent_app_date] => 2008-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 64 [patent_no_of_words] => 27921 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20080233707.pdf [firstpage_image] =>[orig_patent_app_number] => 12153763 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153763
Semiconductor device comprising capacitor and method of fabricating the same May 22, 2008 Issued
Array ( [id] => 5490476 [patent_doc_number] => 20090291547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'Method for Reducing Plasma Discharge Damage During Processing' [patent_app_type] => utility [patent_app_number] => 12/125856 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9073 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20090291547.pdf [firstpage_image] =>[orig_patent_app_number] => 12125856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125856
Method for reducing plasma discharge damage during processing May 21, 2008 Issued
Array ( [id] => 5489336 [patent_doc_number] => 20090290407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'Memory Cells, Memory Cell Constructions, and Memory Cell Programming Methods' [patent_app_type] => utility [patent_app_number] => 12/125756 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7779 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20090290407.pdf [firstpage_image] =>[orig_patent_app_number] => 12125756 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125756
Memory cells, memory cell constructions, and memory cell programming methods May 21, 2008 Issued
Array ( [id] => 4676302 [patent_doc_number] => 20080213932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'METHOD OF IMPROVING THE FLATNESS OF A MICRODISPLAY SURFACE AND METHOD OF MANUFACTURING LIQUID CRYSTAL ON SILICON (LCOS) DISPLAY PANEL THE SAME' [patent_app_type] => utility [patent_app_number] => 12/122738 [patent_app_country] => US [patent_app_date] => 2008-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3353 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20080213932.pdf [firstpage_image] =>[orig_patent_app_number] => 12122738 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/122738
Method of improving the flatness of a microdisplay surface and method of manufacturing liquid crystal on silicon (LCOS) display panel the same May 18, 2008 Issued
Array ( [id] => 5549820 [patent_doc_number] => 20090283806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'MOSFET WITH ASYMMETRICAL EXTENSION IMPLANT' [patent_app_type] => utility [patent_app_number] => 12/121387 [patent_app_country] => US [patent_app_date] => 2008-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2599 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20090283806.pdf [firstpage_image] =>[orig_patent_app_number] => 12121387 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/121387
MOSFET with asymmetrical extension implant May 14, 2008 Issued
Array ( [id] => 7965671 [patent_doc_number] => 07939364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Optimized lid attach process for thermal management and multi-surface compliant heat removal' [patent_app_type] => utility [patent_app_number] => 12/121337 [patent_app_country] => US [patent_app_date] => 2008-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2618 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/939/07939364.pdf [firstpage_image] =>[orig_patent_app_number] => 12121337 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/121337
Optimized lid attach process for thermal management and multi-surface compliant heat removal May 14, 2008 Issued
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