
David Nhu
Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2895, 2818, 2817 |
| Total Applications | 2355 |
| Issued Applications | 2255 |
| Pending Applications | 12 |
| Abandoned Applications | 91 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5374280
[patent_doc_number] => 20090311841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-17
[patent_title] => 'Method of Manufacturing a Through-Silicon-Via On-Chip Passive MMW Bandpass Filter'
[patent_app_type] => utility
[patent_app_number] => 12/140439
[patent_app_country] => US
[patent_app_date] => 2008-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4749
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0311/20090311841.pdf
[firstpage_image] =>[orig_patent_app_number] => 12140439
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/140439 | Method of manufacturing a through-silicon-via on-chip passive MMW bandpass filter | Jun 16, 2008 | Issued |
Array
(
[id] => 5349517
[patent_doc_number] => 20090004878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/213137
[patent_app_country] => US
[patent_app_date] => 2008-06-16
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 30240
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[pdf_file] => publications/A1/0004/20090004878.pdf
[firstpage_image] =>[orig_patent_app_number] => 12213137
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/213137 | Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device | Jun 15, 2008 | Issued |
Array
(
[id] => 4756726
[patent_doc_number] => 20080308951
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'Semiconductor package and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/157836
[patent_app_country] => US
[patent_app_date] => 2008-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0308/20080308951.pdf
[firstpage_image] =>[orig_patent_app_number] => 12157836
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/157836 | Semiconductor package and fabrication method thereof | Jun 12, 2008 | Abandoned |
Array
(
[id] => 81648
[patent_doc_number] => 07745349
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-29
[patent_title] => 'Method for fabricating semiconductor transistor'
[patent_app_type] => utility
[patent_app_number] => 12/137650
[patent_app_country] => US
[patent_app_date] => 2008-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/07/745/07745349.pdf
[firstpage_image] =>[orig_patent_app_number] => 12137650
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/137650 | Method for fabricating semiconductor transistor | Jun 11, 2008 | Issued |
Array
(
[id] => 4852646
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[patent_issue_date] => 2008-12-25
[patent_title] => 'METHOD OF FORMING ALIGNMENT KEY OF SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/137669
[patent_app_country] => US
[patent_app_date] => 2008-06-12
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[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0318/20080318389.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/137669 | METHOD OF FORMING ALIGNMENT KEY OF SEMICONDUCTOR DEVICE | Jun 11, 2008 | Abandoned |
Array
(
[id] => 4852678
[patent_doc_number] => 20080318421
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[patent_issue_date] => 2008-12-25
[patent_title] => 'METHODS OF FORMING FILMS OF A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/137059
[patent_app_country] => US
[patent_app_date] => 2008-06-11
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[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0318/20080318421.pdf
[firstpage_image] =>[orig_patent_app_number] => 12137059
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/137059 | METHODS OF FORMING FILMS OF A SEMICONDUCTOR DEVICE | Jun 10, 2008 | Abandoned |
Array
(
[id] => 5364921
[patent_doc_number] => 20090302480
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-10
[patent_title] => 'Through Substrate Via Semiconductor Components'
[patent_app_type] => utility
[patent_app_number] => 12/135059
[patent_app_country] => US
[patent_app_date] => 2008-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 6416
[patent_no_of_claims] => 28
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[pdf_file] => publications/A1/0302/20090302480.pdf
[firstpage_image] =>[orig_patent_app_number] => 12135059
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/135059 | Through substrate via semiconductor components | Jun 5, 2008 | Issued |
Array
(
[id] => 4613006
[patent_doc_number] => 07989354
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-02
[patent_title] => 'Patterning method'
[patent_app_type] => utility
[patent_app_number] => 12/441754
[patent_app_country] => US
[patent_app_date] => 2008-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 37
[patent_no_of_words] => 12073
[patent_no_of_claims] => 30
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[pdf_file] => patents/07/989/07989354.pdf
[firstpage_image] =>[orig_patent_app_number] => 12441754
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/441754 | Patterning method | Jun 5, 2008 | Issued |
Array
(
[id] => 22167
[patent_doc_number] => 07799626
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-21
[patent_title] => 'Lateral DMOS device structure and fabrication method therefor'
[patent_app_type] => utility
[patent_app_number] => 12/133409
[patent_app_country] => US
[patent_app_date] => 2008-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 3648
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[pdf_file] => patents/07/799/07799626.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133409
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133409 | Lateral DMOS device structure and fabrication method therefor | Jun 4, 2008 | Issued |
Array
(
[id] => 7544410
[patent_doc_number] => 08052375
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-08
[patent_title] => 'Fluidic sealing for turbomachinery'
[patent_app_type] => utility
[patent_app_number] => 12/131193
[patent_app_country] => US
[patent_app_date] => 2008-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 1960
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[pdf_file] => patents/08/052/08052375.pdf
[firstpage_image] =>[orig_patent_app_number] => 12131193
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/131193 | Fluidic sealing for turbomachinery | Jun 1, 2008 | Issued |
Array
(
[id] => 5264998
[patent_doc_number] => 20090117683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'Method of manufacturing single crystal substate and method of manufacturing solar cell using the same'
[patent_app_type] => utility
[patent_app_number] => 12/155156
[patent_app_country] => US
[patent_app_date] => 2008-05-30
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[pdf_file] => publications/A1/0117/20090117683.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/155156 | Method of manufacturing single crystal substate and method of manufacturing solar cell using the same | May 29, 2008 | Abandoned |
Array
(
[id] => 14392
[patent_doc_number] => 07808026
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[patent_issue_date] => 2010-10-05
[patent_title] => 'Dry etching method and production method of magnetic memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/153848 | Dry etching method and production method of magnetic memory device | May 26, 2008 | Issued |
Array
(
[id] => 5499368
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[patent_country] => US
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[patent_issue_date] => 2009-06-25
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/127027 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | May 26, 2008 | Abandoned |
Array
(
[id] => 4816981
[patent_doc_number] => 20080224240
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[patent_issue_date] => 2008-09-18
[patent_title] => 'ATOMIC LAYER DEPOSITION OF Zrx Hfy Sn1-x-y O2 FILMS AS HIGH k GATE DIELECTRICS'
[patent_app_type] => utility
[patent_app_number] => 12/126311
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/126311 | Zrx Hfy Sn1-x-y O2 films as high k gate dielectrics | May 22, 2008 | Issued |
Array
(
[id] => 4740054
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/153763 | Semiconductor device comprising capacitor and method of fabricating the same | May 22, 2008 | Issued |
Array
(
[id] => 5490476
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[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'Method for Reducing Plasma Discharge Damage During Processing'
[patent_app_type] => utility
[patent_app_number] => 12/125856
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[patent_app_date] => 2008-05-22
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[firstpage_image] =>[orig_patent_app_number] => 12125856
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/125856 | Method for reducing plasma discharge damage during processing | May 21, 2008 | Issued |
Array
(
[id] => 5489336
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[patent_title] => 'Memory Cells, Memory Cell Constructions, and Memory Cell Programming Methods'
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Array
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[patent_app_type] => utility
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Array
(
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[patent_title] => 'MOSFET WITH ASYMMETRICAL EXTENSION IMPLANT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/121387 | MOSFET with asymmetrical extension implant | May 14, 2008 | Issued |
Array
(
[id] => 7965671
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[patent_issue_date] => 2011-05-10
[patent_title] => 'Optimized lid attach process for thermal management and multi-surface compliant heat removal'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/121337 | Optimized lid attach process for thermal management and multi-surface compliant heat removal | May 14, 2008 | Issued |