Search

David Nhu

Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )

Most Active Art Unit
2818
Art Unit(s)
2895, 2818, 2817
Total Applications
2355
Issued Applications
2255
Pending Applications
12
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4776031 [patent_doc_number] => 20080284029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Contact structures and semiconductor devices including the same and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 12/151997 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20080284029.pdf [firstpage_image] =>[orig_patent_app_number] => 12151997 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/151997
Methods of forming contact structures semiconductor devices May 11, 2008 Issued
Array ( [id] => 162358 [patent_doc_number] => 07670939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Semiconductor chip bump connection apparatus and method' [patent_app_type] => utility [patent_app_number] => 12/119174 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4272 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/670/07670939.pdf [firstpage_image] =>[orig_patent_app_number] => 12119174 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119174
Semiconductor chip bump connection apparatus and method May 11, 2008 Issued
Array ( [id] => 4682392 [patent_doc_number] => 20080248618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'ATOMIC LAYER DEPOSITION OF CeO2/Al2O3 FILMS AS GATE DIELECTRICS' [patent_app_type] => utility [patent_app_number] => 12/117361 [patent_app_country] => US [patent_app_date] => 2008-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8141 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20080248618.pdf [firstpage_image] =>[orig_patent_app_number] => 12117361 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/117361
Method of forming an apparatus having a dielectric containing cerium oxide and aluminum oxide May 7, 2008 Issued
Array ( [id] => 4676322 [patent_doc_number] => 20080213952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'SHALLOW TRENCH ISOLATION PROCESS AND STRUCTURE WITH MINIMIZED STRAINED SILICON CONSUMPTION' [patent_app_type] => utility [patent_app_number] => 12/115473 [patent_app_country] => US [patent_app_date] => 2008-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4176 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20080213952.pdf [firstpage_image] =>[orig_patent_app_number] => 12115473 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/115473
Shallow trench isolation process and structure with minimized strained silicon consumption May 4, 2008 Issued
Array ( [id] => 4676293 [patent_doc_number] => 20080213923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'DNA-Based Memory Device and Method of Reading and Writing Same' [patent_app_type] => utility [patent_app_number] => 12/115184 [patent_app_country] => US [patent_app_date] => 2008-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10969 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20080213923.pdf [firstpage_image] =>[orig_patent_app_number] => 12115184 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/115184
DNA-based memory device and method of reading and writing same May 4, 2008 Issued
Array ( [id] => 232695 [patent_doc_number] => 07598120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Method for holding semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/114544 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3417 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598120.pdf [firstpage_image] =>[orig_patent_app_number] => 12114544 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/114544
Method for holding semiconductor wafer May 1, 2008 Issued
Array ( [id] => 4619158 [patent_doc_number] => 07998877 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-16 [patent_title] => 'Diffraction grating in conjunction with reduced thickness to increase efficiency of solar cells' [patent_app_type] => utility [patent_app_number] => 12/151071 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2189 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/998/07998877.pdf [firstpage_image] =>[orig_patent_app_number] => 12151071 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/151071
Diffraction grating in conjunction with reduced thickness to increase efficiency of solar cells May 1, 2008 Issued
Array ( [id] => 4639430 [patent_doc_number] => 08017457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Method of manufacturing semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/149439 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 48 [patent_no_of_words] => 13507 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/017/08017457.pdf [firstpage_image] =>[orig_patent_app_number] => 12149439 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149439
Method of manufacturing semiconductor memory device Apr 30, 2008 Issued
Array ( [id] => 24868 [patent_doc_number] => 07795659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'DRAM device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/149406 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 10713 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795659.pdf [firstpage_image] =>[orig_patent_app_number] => 12149406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149406
DRAM device and method of manufacturing the same Apr 30, 2008 Issued
Array ( [id] => 170607 [patent_doc_number] => 07662720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => '3-Dimensional flash memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/111633 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 48 [patent_no_of_words] => 4034 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/662/07662720.pdf [firstpage_image] =>[orig_patent_app_number] => 12111633 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111633
3-Dimensional flash memory device and method of fabricating the same Apr 28, 2008 Issued
Array ( [id] => 221319 [patent_doc_number] => 07608865 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-10-27 [patent_title] => 'Club extension to a T-gate high electron mobility transistor' [patent_app_type] => utility [patent_app_number] => 12/150417 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4251 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608865.pdf [firstpage_image] =>[orig_patent_app_number] => 12150417 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150417
Club extension to a T-gate high electron mobility transistor Apr 27, 2008 Issued
Array ( [id] => 4624214 [patent_doc_number] => 08003510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Fabrication methods for nano-scale chalcopyritic powders and polymeric thin-film solar cells' [patent_app_type] => utility [patent_app_number] => 12/110295 [patent_app_country] => US [patent_app_date] => 2008-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2653 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/003/08003510.pdf [firstpage_image] =>[orig_patent_app_number] => 12110295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110295
Fabrication methods for nano-scale chalcopyritic powders and polymeric thin-film solar cells Apr 25, 2008 Issued
Array ( [id] => 5397864 [patent_doc_number] => 20090317927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'METHOD OF CLEANING A PATTERNING DEVICE, METHOD OF DEPOSITING A LAYER SYSTEM ON A SUBSTRATE, SYSTEM FOR CLEANING A PATTERNING DEVICE, AND COATING SYSTEM FOR DEPOSITING A LAYER SYSTEM ON A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/109067 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3758 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0317/20090317927.pdf [firstpage_image] =>[orig_patent_app_number] => 12109067 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109067
Method of cleaning a patterning device, method of depositing a layer system on a substrate, system for cleaning a patterning device, and coating system for depositing a layer system on a substrate Apr 23, 2008 Issued
Array ( [id] => 4065 [patent_doc_number] => 07816200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Hardware set for growth of high k and capping material films' [patent_app_type] => utility [patent_app_number] => 12/107183 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/816/07816200.pdf [firstpage_image] =>[orig_patent_app_number] => 12107183 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107183
Hardware set for growth of high k and capping material films Apr 21, 2008 Issued
Array ( [id] => 4856525 [patent_doc_number] => 20080265375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Methods for the single-sided polishing of semiconductor wafers and semiconductor wafer having a relaxed Si1-x GEx Layer' [patent_app_type] => utility [patent_app_number] => 12/148739 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5978 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265375.pdf [firstpage_image] =>[orig_patent_app_number] => 12148739 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/148739
Methods for the single-sided polishing of semiconductor wafers and semiconductor wafer having a relaxed Si1-x GEx Layer Apr 21, 2008 Abandoned
Array ( [id] => 4883919 [patent_doc_number] => 20080258251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 12/106317 [patent_app_country] => US [patent_app_date] => 2008-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258251.pdf [firstpage_image] =>[orig_patent_app_number] => 12106317 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/106317
Image sensor Apr 19, 2008 Issued
Array ( [id] => 202522 [patent_doc_number] => 07632730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'CMOS image sensor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/105493 [patent_app_country] => US [patent_app_date] => 2008-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4839 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/632/07632730.pdf [firstpage_image] =>[orig_patent_app_number] => 12105493 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/105493
CMOS image sensor and method for manufacturing the same Apr 17, 2008 Issued
Array ( [id] => 4792213 [patent_doc_number] => 20080293187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Substrate table and chip manufacturing method' [patent_app_type] => utility [patent_app_number] => 12/081534 [patent_app_country] => US [patent_app_date] => 2008-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293187.pdf [firstpage_image] =>[orig_patent_app_number] => 12081534 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081534
Substrate table Apr 16, 2008 Issued
Array ( [id] => 4887008 [patent_doc_number] => 20080261340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'SURFACE-ROUGHENING METHOD' [patent_app_type] => utility [patent_app_number] => 12/104097 [patent_app_country] => US [patent_app_date] => 2008-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5861 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20080261340.pdf [firstpage_image] =>[orig_patent_app_number] => 12104097 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/104097
Surface-roughening method Apr 15, 2008 Issued
Array ( [id] => 4873264 [patent_doc_number] => 20080199998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'PRE-EPITAXIAL DISPOSABLE SPACER INTEGRATION SCHEME WITH VERY LOW TEMPERATURE SELECTIVE EPITAXY FOR ENHANCED DEVICE PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 12/100644 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6070 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20080199998.pdf [firstpage_image] =>[orig_patent_app_number] => 12100644 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100644
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance Apr 9, 2008 Issued
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