
David Nhu
Examiner (ID: 12263, Phone: (571)272-1792 , Office: P/2817 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2895, 2818, 2817 |
| Total Applications | 2355 |
| Issued Applications | 2255 |
| Pending Applications | 12 |
| Abandoned Applications | 91 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5163074
[patent_doc_number] => 20070284655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/822650
[patent_app_country] => US
[patent_app_date] => 2007-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3914
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0284/20070284655.pdf
[firstpage_image] =>[orig_patent_app_number] => 11822650
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/822650 | Semiconductor device and method for fabricating the same | Jul 8, 2007 | Issued |
Array
(
[id] => 4803134
[patent_doc_number] => 20080014722
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/775130
[patent_app_country] => US
[patent_app_date] => 2007-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4818
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20080014722.pdf
[firstpage_image] =>[orig_patent_app_number] => 11775130
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/775130 | Semiconductor device and method for forming the same | Jul 8, 2007 | Issued |
Array
(
[id] => 4803147
[patent_doc_number] => 20080014735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-17
[patent_title] => 'METHOD OF FORMING SEMICONDUCTOR CHIPS, THE SEMICONDUCTOR CHIPS SO FORMED AND CHIP-STACK PACKAGE HAVING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/775120
[patent_app_country] => US
[patent_app_date] => 2007-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3371
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20080014735.pdf
[firstpage_image] =>[orig_patent_app_number] => 11775120
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/775120 | Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same | Jul 8, 2007 | Issued |
Array
(
[id] => 5307524
[patent_doc_number] => 20090014805
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-15
[patent_title] => 'METHOD TO IMPROVE PERFORMANCE OF SECONDARY ACTIVE COMPONENTS IN AN ESIGE CMOS TECHNOLOGY'
[patent_app_type] => utility
[patent_app_number] => 11/774820
[patent_app_country] => US
[patent_app_date] => 2007-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3739
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20090014805.pdf
[firstpage_image] =>[orig_patent_app_number] => 11774820
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/774820 | Method to improve performance of secondary active components in an esige CMOS technology | Jul 8, 2007 | Issued |
Array
(
[id] => 5222920
[patent_doc_number] => 20070252186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'MTJ read head with sidewall spacers'
[patent_app_type] => utility
[patent_app_number] => 11/825032
[patent_app_country] => US
[patent_app_date] => 2007-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2095
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0252/20070252186.pdf
[firstpage_image] =>[orig_patent_app_number] => 11825032
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/825032 | MTJ read head with sidewall spacers | Jul 2, 2007 | Issued |
Array
(
[id] => 259933
[patent_doc_number] => 07572656
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Mask and method of manufacturing liquid crystal display device using the same'
[patent_app_type] => utility
[patent_app_number] => 11/822296
[patent_app_country] => US
[patent_app_date] => 2007-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 3508
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/572/07572656.pdf
[firstpage_image] =>[orig_patent_app_number] => 11822296
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/822296 | Mask and method of manufacturing liquid crystal display device using the same | Jul 2, 2007 | Issued |
Array
(
[id] => 4797530
[patent_doc_number] => 20080009116
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-10
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/822176
[patent_app_country] => US
[patent_app_date] => 2007-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0009/20080009116.pdf
[firstpage_image] =>[orig_patent_app_number] => 11822176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/822176 | Method for fabricating semiconductor device | Jul 2, 2007 | Issued |
Array
(
[id] => 5222956
[patent_doc_number] => 20070252222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'Method for manufacturig a semiconductor device including a shallow trench isolation'
[patent_app_type] => utility
[patent_app_number] => 11/824763
[patent_app_country] => US
[patent_app_date] => 2007-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3009
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0252/20070252222.pdf
[firstpage_image] =>[orig_patent_app_number] => 11824763
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/824763 | Method for manufacturing a semiconductor device including a shallow trench isolation structure | Jul 1, 2007 | Issued |
Array
(
[id] => 4647807
[patent_doc_number] => 20080035062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'DEPOSITION SYSTEM FOR INCREASING DEPOSITION RATES OF METAL LAYERS FROM METAL-CARBONYL PRECURSORS'
[patent_app_type] => utility
[patent_app_number] => 11/771262
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7483
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20080035062.pdf
[firstpage_image] =>[orig_patent_app_number] => 11771262
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/771262 | Deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors | Jun 28, 2007 | Issued |
Array
(
[id] => 5349446
[patent_doc_number] => 20090004807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'PASSIVE ELEMENTS, ARTICLES, PACKAGES, SEMICONDUCTOR COMPOSITES, AND METHODS OF MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/772080
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7195
[patent_no_of_claims] => 54
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20090004807.pdf
[firstpage_image] =>[orig_patent_app_number] => 11772080
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772080 | Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same | Jun 28, 2007 | Issued |
Array
(
[id] => 5345984
[patent_doc_number] => 20090001345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-01
[patent_title] => 'MEMORY CELL THAT EMPLOYS A SELECTIVELY DEPOSITED REVERSIBLE RESISTANCE-SWITCHING ELEMENT AND METHODS OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/772090
[patent_app_country] => US
[patent_app_date] => 2007-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8798
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20090001345.pdf
[firstpage_image] =>[orig_patent_app_number] => 11772090
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/772090 | Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same | Jun 28, 2007 | Issued |
Array
(
[id] => 5209337
[patent_doc_number] => 20070247921
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'Scalable high performance non-volatile memory cells using multi-mechanism carrier transport'
[patent_app_type] => utility
[patent_app_number] => 11/821627
[patent_app_country] => US
[patent_app_date] => 2007-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3599
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0247/20070247921.pdf
[firstpage_image] =>[orig_patent_app_number] => 11821627
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/821627 | Scalable high performance non-volatile memory cells using multi-mechanism carrier transport | Jun 24, 2007 | Issued |
Array
(
[id] => 4825975
[patent_doc_number] => 20080124897
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Method of producing bonded wafer'
[patent_app_type] => utility
[patent_app_number] => 11/823010
[patent_app_country] => US
[patent_app_date] => 2007-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3673
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20080124897.pdf
[firstpage_image] =>[orig_patent_app_number] => 11823010
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/823010 | Method of producing bonded wafer | Jun 24, 2007 | Issued |
Array
(
[id] => 4665386
[patent_doc_number] => 20080256293
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'CARRIER FOR MANUFACTURING A MEMORY DEVICE, METHOD USING THE SAME, MEMORY DEVICE USING THE SAME AND MANUFACTURING METHOD OF A MEMORY DEVICE USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/768023
[patent_app_country] => US
[patent_app_date] => 2007-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3295
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20080256293.pdf
[firstpage_image] =>[orig_patent_app_number] => 11768023
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/768023 | Method using a carrier for manufacturing a memory device and manufacturing method of a memory device using the same and memory device using the same | Jun 24, 2007 | Issued |
Array
(
[id] => 221000
[patent_doc_number] => 07608546
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-27
[patent_title] => 'Method for fabricating a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/765673
[patent_app_country] => US
[patent_app_date] => 2007-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2304
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/608/07608546.pdf
[firstpage_image] =>[orig_patent_app_number] => 11765673
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/765673 | Method for fabricating a semiconductor device | Jun 19, 2007 | Issued |
Array
(
[id] => 330437
[patent_doc_number] => 07510932
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-31
[patent_title] => 'Semiconductor devices having a field effect transistor and methods of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/764751
[patent_app_country] => US
[patent_app_date] => 2007-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 35
[patent_no_of_words] => 10017
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/510/07510932.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764751
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764751 | Semiconductor devices having a field effect transistor and methods of fabricating the same | Jun 17, 2007 | Issued |
Array
(
[id] => 7535111
[patent_doc_number] => 08048735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Manufacturing method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/764073
[patent_app_country] => US
[patent_app_date] => 2007-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 38
[patent_no_of_words] => 19951
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/048/08048735.pdf
[firstpage_image] =>[orig_patent_app_number] => 11764073
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/764073 | Manufacturing method of semiconductor device | Jun 14, 2007 | Issued |
Array
(
[id] => 5208233
[patent_doc_number] => 20070246817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'Solder ball assembly for a semiconductor device and method of fabricating same'
[patent_app_type] => utility
[patent_app_number] => 11/818665
[patent_app_country] => US
[patent_app_date] => 2007-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2273
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20070246817.pdf
[firstpage_image] =>[orig_patent_app_number] => 11818665
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/818665 | Solder ball assembly for a semiconductor device and method of fabricating same | Jun 13, 2007 | Issued |
Array
(
[id] => 8256610
[patent_doc_number] => 08206084
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-26
[patent_title] => 'Blade wheel'
[patent_app_type] => utility
[patent_app_number] => 12/308526
[patent_app_country] => US
[patent_app_date] => 2007-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3021
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12308526
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/308526 | Blade wheel | Jun 13, 2007 | Issued |
Array
(
[id] => 4949500
[patent_doc_number] => 20080305626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'METHOD OF FORMING SOLID BLIND VIAS THROUGH THE DIELECTRIC COATING ON HIGH DENSITY INTERCONNECT SUBSTRATE MATERIALS'
[patent_app_type] => utility
[patent_app_number] => 11/760804
[patent_app_country] => US
[patent_app_date] => 2007-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5782
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0305/20080305626.pdf
[firstpage_image] =>[orig_patent_app_number] => 11760804
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/760804 | Method of forming solid blind vias through the dielectric coating on high density interconnect substrate materials | Jun 10, 2007 | Issued |