Search

David R. Morris

Examiner (ID: 19201, Phone: (571)270-3595 , Office: P/3659 )

Most Active Art Unit
3659
Art Unit(s)
3659, 3616, OPQA
Total Applications
693
Issued Applications
527
Pending Applications
85
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9944768 [patent_doc_number] => 08994068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'ESD protection device' [patent_app_type] => utility [patent_app_number] => 13/599244 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5994 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599244 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/599244
ESD protection device Aug 29, 2012 Issued
Array ( [id] => 10909308 [patent_doc_number] => 20140312324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'ORGANIC EL ELEMENT AND METHOD OF MANUFACTURING THE SAME, ORGANIC EL PANEL, ORGANIC EL LIGHT-EMITTING DEVICE, AND ORGANIC EL DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/123253 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5246 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14123253 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/123253
Organic EL element including a hole injection layer with a proportion of sulphur atoms relative to metal atoms Aug 27, 2012 Issued
Array ( [id] => 8680908 [patent_doc_number] => 20130049192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'STACKED CHIP PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/591225 [patent_app_country] => US [patent_app_date] => 2012-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2030 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591225 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/591225
STACKED CHIP PACKAGE AND FABRICATION METHOD THEREOF Aug 21, 2012 Abandoned
Array ( [id] => 9316588 [patent_doc_number] => 20140048926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/585500 [patent_app_country] => US [patent_app_date] => 2012-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4650 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/585500
Semiconductor package having a recess filled with a molding compound Aug 13, 2012 Issued
Array ( [id] => 8888652 [patent_doc_number] => 20130161836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'SEMICONDUCTOR PACKAGE HAVING INTERPOSER COMPRISING A PLURALITY OF SEGMENTS' [patent_app_type] => utility [patent_app_number] => 13/584637 [patent_app_country] => US [patent_app_date] => 2012-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584637 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/584637
SEMICONDUCTOR PACKAGE HAVING INTERPOSER COMPRISING A PLURALITY OF SEGMENTS Aug 12, 2012 Abandoned
Array ( [id] => 9303948 [patent_doc_number] => 20140042622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'Fine Pitch Package-on-Package Structure' [patent_app_type] => utility [patent_app_number] => 13/572417 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572417 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/572417
Fine Pitch Package-on-Package Structure Aug 9, 2012 Abandoned
Array ( [id] => 10888056 [patent_doc_number] => 08912051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-16 [patent_title] => 'Method for controlling molding compound geometry around a semiconductor die' [patent_app_type] => utility [patent_app_number] => 13/564567 [patent_app_country] => US [patent_app_date] => 2012-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 9858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564567 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/564567
Method for controlling molding compound geometry around a semiconductor die Jul 31, 2012 Issued
Array ( [id] => 9279242 [patent_doc_number] => 20140029210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'DIFFUSION BARRIER FOR SURFACE MOUNT MODULES' [patent_app_type] => utility [patent_app_number] => 13/561868 [patent_app_country] => US [patent_app_date] => 2012-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13561868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/561868
Diffusion barrier for surface mount modules Jul 29, 2012 Issued
Array ( [id] => 8937475 [patent_doc_number] => 20130187272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'SEMICONDUCTOR MODULE' [patent_app_type] => utility [patent_app_number] => 13/558523 [patent_app_country] => US [patent_app_date] => 2012-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13558523 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/558523
Semiconductor module including first and second wiring portions separated from each other Jul 25, 2012 Issued
Array ( [id] => 8937489 [patent_doc_number] => 20130187286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'LEAD FRAMELESS HERMETIC CIRCUIT PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/556760 [patent_app_country] => US [patent_app_date] => 2012-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1566 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13556760 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/556760
LEAD FRAMELESS HERMETIC CIRCUIT PACKAGE Jul 23, 2012 Abandoned
Array ( [id] => 9266548 [patent_doc_number] => 20140021464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'Yttrium-doped Indium Oxide Transparent Conductive Thin-Film Transistor and Method for Making Same' [patent_app_type] => utility [patent_app_number] => 13/550653 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 13321 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550653 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/550653
Yttrium-doped Indium Oxide Transparent Conductive Thin-Film Transistor and Method for Making Same Jul 16, 2012 Abandoned
Array ( [id] => 8925424 [patent_doc_number] => 20130181184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/547567 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 15685 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547567 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547567
Nonvolatile semiconductor memory device Jul 11, 2012 Issued
Array ( [id] => 11915230 [patent_doc_number] => 09783407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Method for making a suspended membrane structure with buried electrode' [patent_app_type] => utility [patent_app_number] => 13/546411 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5711 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546411 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546411
Method for making a suspended membrane structure with buried electrode Jul 10, 2012 Issued
Array ( [id] => 11453264 [patent_doc_number] => 09576916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'High frequency circuit comprising graphene and method of operating the same' [patent_app_type] => utility [patent_app_number] => 13/543050 [patent_app_country] => US [patent_app_date] => 2012-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3710 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543050
High frequency circuit comprising graphene and method of operating the same Jul 5, 2012 Issued
Array ( [id] => 9209430 [patent_doc_number] => 20140008607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'QUANTUM EFFICIENCY OF MULTIPLE QUANTUM WELLS' [patent_app_type] => utility [patent_app_number] => 13/541559 [patent_app_country] => US [patent_app_date] => 2012-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4804 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13541559 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/541559
Quantum efficiency of multiple quantum wells Jul 2, 2012 Issued
Array ( [id] => 9188844 [patent_doc_number] => 20130328159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'IMPLEMENTING ISOLATED SILICON REGIONS IN SILICON-ON-INSULATOR (SOI) WAFERS USING BONDED-WAFER TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/494106 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2814 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494106 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494106
IMPLEMENTING ISOLATED SILICON REGIONS IN SILICON-ON-INSULATOR (SOI) WAFERS USING BONDED-WAFER TECHNIQUE Jun 11, 2012 Abandoned
Array ( [id] => 8519881 [patent_doc_number] => 20120319289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/493036 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6932 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493036 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/493036
SEMICONDUCTOR PACKAGE Jun 10, 2012 Abandoned
Array ( [id] => 9188762 [patent_doc_number] => 20130328077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'LIGHT-EMITTING ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/491970 [patent_app_country] => US [patent_app_date] => 2012-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1944 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491970 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/491970
Light-emitting element including a light-emitting stack with an uneven upper surface Jun 7, 2012 Issued
Array ( [id] => 8414438 [patent_doc_number] => 20120241938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'ORGANIC PACKAGING CARRIER' [patent_app_type] => utility [patent_app_number] => 13/490480 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3528 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490480 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/490480
Organic packaging carrier Jun 6, 2012 Issued
Array ( [id] => 9188801 [patent_doc_number] => 20130328116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'DRAM WITH A NANOWIRE ACCESS TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/490759 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 8931 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490759 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/490759
DRAM with a nanowire access transistor Jun 6, 2012 Issued
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