Search

David R. Hudspeth

Supervisory Patent Examiner (ID: 5710, Phone: (571)272-7843 , Office: P/2657 )

Most Active Art Unit
2504
Art Unit(s)
2509, 2626, 2641, 2504, 2657, 2681, 2651, 2741
Total Applications
1592
Issued Applications
1465
Pending Applications
21
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3630184 [patent_doc_number] => 05608339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Device for driving a LED display' [patent_app_type] => 1 [patent_app_number] => 8/519700 [patent_app_country] => US [patent_app_date] => 1995-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6892 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608339.pdf [firstpage_image] =>[orig_patent_app_number] => 519700 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/519700
Device for driving a LED display Aug 27, 1995 Issued
Array ( [id] => 3832331 [patent_doc_number] => 05783949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories' [patent_app_type] => 1 [patent_app_number] => 8/518414 [patent_app_country] => US [patent_app_date] => 1995-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9340 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/783/05783949.pdf [firstpage_image] =>[orig_patent_app_number] => 518414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/518414
Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories Aug 23, 1995 Issued
Array ( [id] => 3553211 [patent_doc_number] => 05546019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-13 [patent_title] => 'CMOS I/O circuit with 3.3 volt output and tolerance of 5 volt input' [patent_app_type] => 1 [patent_app_number] => 8/518700 [patent_app_country] => US [patent_app_date] => 1995-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2504 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/546/05546019.pdf [firstpage_image] =>[orig_patent_app_number] => 518700 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/518700
CMOS I/O circuit with 3.3 volt output and tolerance of 5 volt input Aug 23, 1995 Issued
Array ( [id] => 3555756 [patent_doc_number] => 05572146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Noise attenuation output buffer' [patent_app_type] => 1 [patent_app_number] => 8/518017 [patent_app_country] => US [patent_app_date] => 1995-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3117 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572146.pdf [firstpage_image] =>[orig_patent_app_number] => 518017 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/518017
Noise attenuation output buffer Aug 21, 1995 Issued
Array ( [id] => 3653322 [patent_doc_number] => 05629637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Method of time multiplexing a programmable logic device' [patent_app_type] => 1 [patent_app_number] => 8/517017 [patent_app_country] => US [patent_app_date] => 1995-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 82 [patent_no_of_words] => 25802 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629637.pdf [firstpage_image] =>[orig_patent_app_number] => 517017 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/517017
Method of time multiplexing a programmable logic device Aug 17, 1995 Issued
Array ( [id] => 3673387 [patent_doc_number] => 05600263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Configuration modes for a time multiplexed programmable logic device' [patent_app_type] => 1 [patent_app_number] => 8/517018 [patent_app_country] => US [patent_app_date] => 1995-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 82 [patent_no_of_words] => 25812 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600263.pdf [firstpage_image] =>[orig_patent_app_number] => 517018 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/517018
Configuration modes for a time multiplexed programmable logic device Aug 17, 1995 Issued
Array ( [id] => 3535634 [patent_doc_number] => 05583450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Sequencer for a time multiplexed programmable logic device' [patent_app_type] => 1 [patent_app_number] => 8/517020 [patent_app_country] => US [patent_app_date] => 1995-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 82 [patent_no_of_words] => 25624 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583450.pdf [firstpage_image] =>[orig_patent_app_number] => 517020 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/517020
Sequencer for a time multiplexed programmable logic device Aug 17, 1995 Issued
Array ( [id] => 3577048 [patent_doc_number] => 05539335 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Output buffer circuit for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/512913 [patent_app_country] => US [patent_app_date] => 1995-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5808 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539335.pdf [firstpage_image] =>[orig_patent_app_number] => 512913 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512913
Output buffer circuit for semiconductor device Aug 8, 1995 Issued
Array ( [id] => 3555831 [patent_doc_number] => 05572151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Pass transistor type selector circuit and digital logic circuit' [patent_app_type] => 1 [patent_app_number] => 8/511802 [patent_app_country] => US [patent_app_date] => 1995-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5030 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572151.pdf [firstpage_image] =>[orig_patent_app_number] => 511802 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511802
Pass transistor type selector circuit and digital logic circuit Aug 6, 1995 Issued
Array ( [id] => 3617856 [patent_doc_number] => 05565797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Clock signal generating device' [patent_app_type] => 1 [patent_app_number] => 8/512222 [patent_app_country] => US [patent_app_date] => 1995-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 4080 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/565/05565797.pdf [firstpage_image] =>[orig_patent_app_number] => 512222 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512222
Clock signal generating device Aug 6, 1995 Issued
Array ( [id] => 3653307 [patent_doc_number] => 05629636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Ram-logic tile for field programmable gate arrays' [patent_app_type] => 1 [patent_app_number] => 8/521375 [patent_app_country] => US [patent_app_date] => 1995-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2534 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629636.pdf [firstpage_image] =>[orig_patent_app_number] => 521375 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/521375
Ram-logic tile for field programmable gate arrays Jul 31, 1995 Issued
Array ( [id] => 3687967 [patent_doc_number] => 05633599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Semiconductor integrated circuit with a test circuit for input buffer threshold' [patent_app_type] => 1 [patent_app_number] => 8/509616 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 20699 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633599.pdf [firstpage_image] =>[orig_patent_app_number] => 509616 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509616
Semiconductor integrated circuit with a test circuit for input buffer threshold Jul 30, 1995 Issued
Array ( [id] => 3587439 [patent_doc_number] => 05581200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Stored and combinational logic function generator without dedicated storage elements' [patent_app_type] => 1 [patent_app_number] => 8/499737 [patent_app_country] => US [patent_app_date] => 1995-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3439 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581200.pdf [firstpage_image] =>[orig_patent_app_number] => 499737 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/499737
Stored and combinational logic function generator without dedicated storage elements Jul 6, 1995 Issued
Array ( [id] => 3664428 [patent_doc_number] => 05592103 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'System for fast switching of time critical input signals' [patent_app_type] => 1 [patent_app_number] => 8/499407 [patent_app_country] => US [patent_app_date] => 1995-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592103.pdf [firstpage_image] =>[orig_patent_app_number] => 499407 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/499407
System for fast switching of time critical input signals Jul 2, 1995 Issued
Array ( [id] => 3512498 [patent_doc_number] => 05570041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Programmable logic module and architecture for field programmable gate array device' [patent_app_type] => 1 [patent_app_number] => 8/504051 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6780 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570041.pdf [firstpage_image] =>[orig_patent_app_number] => 504051 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504051
Programmable logic module and architecture for field programmable gate array device Jun 27, 1995 Issued
Array ( [id] => 3619765 [patent_doc_number] => 05510730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'Reconfigurable programmable interconnect architecture' [patent_app_type] => 1 [patent_app_number] => 8/493137 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5045 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/510/05510730.pdf [firstpage_image] =>[orig_patent_app_number] => 493137 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/493137
Reconfigurable programmable interconnect architecture Jun 20, 1995 Issued
Array ( [id] => 3497730 [patent_doc_number] => 05537058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Semiconductor device having high speed input circuit' [patent_app_type] => 1 [patent_app_number] => 8/493305 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 3783 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537058.pdf [firstpage_image] =>[orig_patent_app_number] => 493305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/493305
Semiconductor device having high speed input circuit Jun 20, 1995 Issued
Array ( [id] => 3625994 [patent_doc_number] => 05614848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'High-speed semiconductor integrated circuit device composed of CMOS and bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 8/482570 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 80 [patent_no_of_words] => 33654 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614848.pdf [firstpage_image] =>[orig_patent_app_number] => 482570 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/482570
High-speed semiconductor integrated circuit device composed of CMOS and bipolar transistors Jun 6, 1995 Issued
Array ( [id] => 3530700 [patent_doc_number] => 05528176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Register with duplicate decoders for configurable cellular array' [patent_app_type] => 1 [patent_app_number] => 8/486460 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 61 [patent_no_of_words] => 27745 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528176.pdf [firstpage_image] =>[orig_patent_app_number] => 486460 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486460
Register with duplicate decoders for configurable cellular array Jun 6, 1995 Issued
Array ( [id] => 4418154 [patent_doc_number] => 06301065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Method for recording and reproducing CRT various types of data so as to permit the use of the same mechanical and servo systems thereof' [patent_app_type] => 1 [patent_app_number] => 8/480934 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 6495 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301065.pdf [firstpage_image] =>[orig_patent_app_number] => 480934 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480934
Method for recording and reproducing CRT various types of data so as to permit the use of the same mechanical and servo systems thereof Jun 6, 1995 Issued
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