
David R. Hudspeth
Supervisory Patent Examiner (ID: 5710, Phone: (571)272-7843 , Office: P/2657 )
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2509, 2626, 2641, 2504, 2657, 2681, 2651, 2741 |
| Total Applications | 1592 |
| Issued Applications | 1465 |
| Pending Applications | 21 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3630184
[patent_doc_number] => 05608339
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[patent_kind] => NA
[patent_issue_date] => 1997-03-04
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[patent_app_number] => 8/519700
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Array
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[patent_doc_number] => 05783949
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[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Precharged bit decoder and sense amplifier with integrated latch usable in pipelined memories'
[patent_app_type] => 1
[patent_app_number] => 8/518414
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Array
(
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[patent_doc_number] => 05546019
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[patent_issue_date] => 1996-08-13
[patent_title] => 'CMOS I/O circuit with 3.3 volt output and tolerance of 5 volt input'
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Array
(
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[patent_doc_number] => 05572146
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[patent_issue_date] => 1996-11-05
[patent_title] => 'Noise attenuation output buffer'
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Array
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Array
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Array
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Array
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[id] => 3577048
[patent_doc_number] => 05539335
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[patent_issue_date] => 1996-07-23
[patent_title] => 'Output buffer circuit for semiconductor device'
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Array
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[id] => 3555831
[patent_doc_number] => 05572151
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[patent_issue_date] => 1996-11-05
[patent_title] => 'Pass transistor type selector circuit and digital logic circuit'
[patent_app_type] => 1
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Array
(
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[patent_title] => 'Clock signal generating device'
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[firstpage_image] =>[orig_patent_app_number] => 512222
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Array
(
[id] => 3653307
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[patent_title] => 'Ram-logic tile for field programmable gate arrays'
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Array
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Array
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Array
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Array
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Array
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