Search

David Robertson

Examiner (ID: 18617)

Most Active Art Unit
2121
Art Unit(s)
2163, 2127, 3623, 2121
Total Applications
304
Issued Applications
193
Pending Applications
23
Abandoned Applications
92

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18969407 [patent_doc_number] => 11903219 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors [patent_app_type] => utility [patent_app_number] => 17/654526 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654526
Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors Mar 10, 2022 Issued
Array ( [id] => 18985408 [patent_doc_number] => 11910618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-20 [patent_title] => Multi-element ferroelectric gain memory bit-cell having stacked and folded non-planar capacitors [patent_app_type] => utility [patent_app_number] => 17/654562 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654562
Multi-element ferroelectric gain memory bit-cell having stacked and folded non-planar capacitors Mar 10, 2022 Issued
Array ( [id] => 19428296 [patent_doc_number] => 12087730 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-10 [patent_title] => Multi-input threshold gate having stacked and folded planar capacitors with and without offset [patent_app_type] => utility [patent_app_number] => 17/654564 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71109 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654564 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654564
Multi-input threshold gate having stacked and folded planar capacitors with and without offset Mar 10, 2022 Issued
Array ( [id] => 18804105 [patent_doc_number] => 11837268 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors with lateral offset [patent_app_type] => utility [patent_app_number] => 17/654560 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71064 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654560 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654560
Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors with lateral offset Mar 10, 2022 Issued
Array ( [id] => 19315949 [patent_doc_number] => 12041785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-16 [patent_title] => 1TnC memory bit-cell having stacked and folded non-planar capacitors [patent_app_type] => utility [patent_app_number] => 17/654383 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654383 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654383
1TnC memory bit-cell having stacked and folded non-planar capacitors Mar 9, 2022 Issued
Array ( [id] => 19200589 [patent_doc_number] => 11997853 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-28 [patent_title] => 1TnC memory bit-cell having stacked and folded planar capacitors with lateral offset [patent_app_type] => utility [patent_app_number] => 17/654379 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71127 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654379 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654379
1TnC memory bit-cell having stacked and folded planar capacitors with lateral offset Mar 9, 2022 Issued
Array ( [id] => 19488866 [patent_doc_number] => 12108609 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-10-01 [patent_title] => Memory bit-cell with stacked and folded planar capacitors [patent_app_type] => utility [patent_app_number] => 17/653811 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 85 [patent_no_of_words] => 71076 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17653811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/653811
Memory bit-cell with stacked and folded planar capacitors Mar 6, 2022 Issued
Array ( [id] => 18225146 [patent_doc_number] => 20230064140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/686835 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17686835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/686835
Memory device and memory system Mar 3, 2022 Issued
Array ( [id] => 18415817 [patent_doc_number] => 11670362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Sub-word line driver placement for memory device [patent_app_type] => utility [patent_app_number] => 17/687272 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687272
Sub-word line driver placement for memory device Mar 3, 2022 Issued
Array ( [id] => 18766741 [patent_doc_number] => 11817148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Techniques for programming a memory cell [patent_app_type] => utility [patent_app_number] => 17/685219 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685219
Techniques for programming a memory cell Mar 1, 2022 Issued
Array ( [id] => 17886136 [patent_doc_number] => 20220301613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => DEVICE AND METHOD FOR PERFORMING MATRIX OPERATION [patent_app_type] => utility [patent_app_number] => 17/682526 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682526
Device and method for performing matrix operation Feb 27, 2022 Issued
Array ( [id] => 18599985 [patent_doc_number] => 20230274786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => APPARATUS AND METHODS FOR DETERMINING MEMORY CELL DATA STATES [patent_app_type] => utility [patent_app_number] => 17/681976 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681976 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681976
Apparatus and methods for determining memory cell data states Feb 27, 2022 Issued
Array ( [id] => 17676823 [patent_doc_number] => 20220189990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => 3D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH BIT-LINE PILLARS [patent_app_type] => utility [patent_app_number] => 17/681767 [patent_app_country] => US [patent_app_date] => 2022-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681767
3D memory semiconductor devices and structures with bit-line pillars Feb 25, 2022 Issued
Array ( [id] => 18874458 [patent_doc_number] => 11862279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Method and device for determining repaired line and repairing line in memory, storage medium, and electronic device [patent_app_type] => utility [patent_app_number] => 17/651446 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6601 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651446
Method and device for determining repaired line and repairing line in memory, storage medium, and electronic device Feb 16, 2022 Issued
Array ( [id] => 19973183 [patent_doc_number] => 12341808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Detecting automated attacks on computer systems using real-time clustering [patent_app_type] => utility [patent_app_number] => 17/671349 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 878 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671349
Detecting automated attacks on computer systems using real-time clustering Feb 13, 2022 Issued
Array ( [id] => 19014981 [patent_doc_number] => 11921912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-05 [patent_title] => Manipulating inter-chip communications for IoT security [patent_app_type] => utility [patent_app_number] => 17/670594 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4762 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670594
Manipulating inter-chip communications for IoT security Feb 13, 2022 Issued
Array ( [id] => 18480985 [patent_doc_number] => 11694736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle [patent_app_type] => utility [patent_app_number] => 17/668592 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 16540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668592
Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle Feb 9, 2022 Issued
Array ( [id] => 17737749 [patent_doc_number] => 20220223211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => INITIALIZATION TECHNIQUES FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/586526 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17586526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/586526
Initialization techniques for memory devices Jan 26, 2022 Issued
Array ( [id] => 18639255 [patent_doc_number] => 11763871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Systems and methods for 1.5 bits per cell charge distribution [patent_app_type] => utility [patent_app_number] => 17/582941 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13528 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582941 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582941
Systems and methods for 1.5 bits per cell charge distribution Jan 23, 2022 Issued
Array ( [id] => 18857028 [patent_doc_number] => 11854619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory device with content addressable memory units [patent_app_type] => utility [patent_app_number] => 17/579165 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579165
Memory device with content addressable memory units Jan 18, 2022 Issued
Menu