Search

David Silver

Examiner (ID: 8712, Phone: (571)272-8634 , Office: P/2123 )

Most Active Art Unit
2128
Art Unit(s)
OPA, OPIM, 2123, 2128, 2127
Total Applications
331
Issued Applications
198
Pending Applications
10
Abandoned Applications
124

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9984619 [patent_doc_number] => 09030340 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-12 [patent_title] => 'N-path interleaving analog-to-digital converter (ADC) with background calibration' [patent_app_type] => utility [patent_app_number] => 14/531371 [patent_app_country] => US [patent_app_date] => 2014-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7804 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14531371 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/531371
N-path interleaving analog-to-digital converter (ADC) with background calibration Nov 2, 2014 Issued
Array ( [id] => 10770366 [patent_doc_number] => 20160116523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'Testing of Semiconductor Packages with Integrated Antennas' [patent_app_type] => utility [patent_app_number] => 14/525940 [patent_app_country] => US [patent_app_date] => 2014-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14525940 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/525940
Testing of semiconductor packages with integrated antennas Oct 27, 2014 Issued
Array ( [id] => 10748090 [patent_doc_number] => 20160094242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-31 [patent_title] => 'HIERARCHICAL DATA COMPRESSION AND COMPUTATION' [patent_app_type] => utility [patent_app_number] => 14/501790 [patent_app_country] => US [patent_app_date] => 2014-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12880 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14501790 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/501790
Hierarchical data compression and computation Sep 29, 2014 Issued
Array ( [id] => 10159240 [patent_doc_number] => 09191025 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-17 [patent_title] => 'Segmented digital-to-analog converter' [patent_app_type] => utility [patent_app_number] => 14/502360 [patent_app_country] => US [patent_app_date] => 2014-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 16754 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14502360 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/502360
Segmented digital-to-analog converter Sep 29, 2014 Issued
Array ( [id] => 11072080 [patent_doc_number] => 20160269044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'CIRCUITS, METHODS, AND MEDIA FOR PROVIDING DELTA-SIGMA MODULATORS' [patent_app_type] => utility [patent_app_number] => 15/025111 [patent_app_country] => US [patent_app_date] => 2014-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3765 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15025111 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/025111
CIRCUITS, METHODS, AND MEDIA FOR PROVIDING DELTA-SIGMA MODULATORS Sep 28, 2014 Abandoned
Array ( [id] => 11201820 [patent_doc_number] => 09432043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Sample rate converter, an analog to digital converter including a sample rate converter and a method of converting a data stream from one data rate to another data rate' [patent_app_type] => utility [patent_app_number] => 14/496980 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14496980 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/496980
Sample rate converter, an analog to digital converter including a sample rate converter and a method of converting a data stream from one data rate to another data rate Sep 24, 2014 Issued
Array ( [id] => 10604722 [patent_doc_number] => 09325296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Buffer offset modulation' [patent_app_type] => utility [patent_app_number] => 14/496149 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14496149 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/496149
Buffer offset modulation Sep 24, 2014 Issued
Array ( [id] => 11946553 [patent_doc_number] => 20170250704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'Improving Communication Efficiency' [patent_app_type] => utility [patent_app_number] => 15/513250 [patent_app_country] => US [patent_app_date] => 2014-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7645 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15513250 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/513250
Improving communication efficiency Sep 24, 2014 Issued
Array ( [id] => 10591253 [patent_doc_number] => 09312876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-12 [patent_title] => 'Asynchronous low-power analog-to-digital converter circuit with configurable thresholds' [patent_app_type] => utility [patent_app_number] => 14/495570 [patent_app_country] => US [patent_app_date] => 2014-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14495570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/495570
Asynchronous low-power analog-to-digital converter circuit with configurable thresholds Sep 23, 2014 Issued
Array ( [id] => 10145705 [patent_doc_number] => 09178524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-03 [patent_title] => 'Hybrid R-2R structure for low glitch noise segmented DAC' [patent_app_type] => utility [patent_app_number] => 14/493254 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9547 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14493254 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/493254
Hybrid R-2R structure for low glitch noise segmented DAC Sep 21, 2014 Issued
Array ( [id] => 10165996 [patent_doc_number] => 09197233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Low power ADC for high dynamic range integrating pixel arrays' [patent_app_type] => utility [patent_app_number] => 14/492310 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3919 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492310 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492310
Low power ADC for high dynamic range integrating pixel arrays Sep 21, 2014 Issued
Array ( [id] => 10199816 [patent_doc_number] => 20150084802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-26 [patent_title] => 'SIGNAL PROCESSING DEVICE AND SIGNAL PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 14/482102 [patent_app_country] => US [patent_app_date] => 2014-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12974 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14482102 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/482102
Signal processing device and signal processing method Sep 9, 2014 Issued
Array ( [id] => 10029341 [patent_doc_number] => 09071258 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-30 [patent_title] => 'Parallel-serial converter circuit' [patent_app_type] => utility [patent_app_number] => 14/481794 [patent_app_country] => US [patent_app_date] => 2014-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14481794 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/481794
Parallel-serial converter circuit Sep 8, 2014 Issued
Array ( [id] => 10604767 [patent_doc_number] => 09325341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Excess loop delay compensation (ELC) for an analog to digital converter (ADC)' [patent_app_type] => utility [patent_app_number] => 14/475852 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3723 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475852 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475852
Excess loop delay compensation (ELC) for an analog to digital converter (ADC) Sep 2, 2014 Issued
Array ( [id] => 10718654 [patent_doc_number] => 20160064801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'Electronic Device Antenna With Reduced Lossy Mode' [patent_app_type] => utility [patent_app_number] => 14/476490 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14476490 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/476490
Electronic device antenna with reduced lossy mode Sep 2, 2014 Issued
Array ( [id] => 10011194 [patent_doc_number] => 09054730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Method and system for LZW based decompression' [patent_app_type] => utility [patent_app_number] => 14/474680 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5902 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/474680
Method and system for LZW based decompression Sep 1, 2014 Issued
Array ( [id] => 10145704 [patent_doc_number] => 09178523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Circuitry and methods for use in mixed-signals circuitry' [patent_app_type] => utility [patent_app_number] => 14/473789 [patent_app_country] => US [patent_app_date] => 2014-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 38 [patent_no_of_words] => 26794 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14473789 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/473789
Circuitry and methods for use in mixed-signals circuitry Aug 28, 2014 Issued
Array ( [id] => 11771511 [patent_doc_number] => 09380235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'AD conversion circuit' [patent_app_type] => utility [patent_app_number] => 14/464120 [patent_app_country] => US [patent_app_date] => 2014-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5140 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464120 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464120
AD conversion circuit Aug 19, 2014 Issued
Array ( [id] => 10944183 [patent_doc_number] => 20140347202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'DUAL-STRING DIGITAL-TO-ANALOG CONVERTERS (DACs), AND RELATED CIRCUITS, SYSTEMS, AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/458377 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 27075 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458377 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/458377
Dual-string digital-to-analog converters (DACs), and related circuits, systems, and methods Aug 12, 2014 Issued
Array ( [id] => 10152458 [patent_doc_number] => 09184763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Capacitive digital to analog converter' [patent_app_type] => utility [patent_app_number] => 14/457184 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4098 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457184 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457184
Capacitive digital to analog converter Aug 11, 2014 Issued
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