Search

David Silver

Examiner (ID: 8712, Phone: (571)272-8634 , Office: P/2123 )

Most Active Art Unit
2128
Art Unit(s)
OPA, OPIM, 2123, 2128, 2127
Total Applications
331
Issued Applications
198
Pending Applications
10
Abandoned Applications
124

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9818726 [patent_doc_number] => 08928517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Pipelined analog-to-digital converter' [patent_app_type] => utility [patent_app_number] => 13/737254 [patent_app_country] => US [patent_app_date] => 2013-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13737254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/737254
Pipelined analog-to-digital converter Jan 8, 2013 Issued
Array ( [id] => 9428606 [patent_doc_number] => 08704686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-22 [patent_title] => 'High bandwidth compression to encoded data streams' [patent_app_type] => utility [patent_app_number] => 13/733354 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5682 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733354 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733354
High bandwidth compression to encoded data streams Jan 2, 2013 Issued
Array ( [id] => 9390271 [patent_doc_number] => 08686881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-01 [patent_title] => 'Efficient estimation of data compression ratios' [patent_app_type] => utility [patent_app_number] => 13/732449 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732449 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732449
Efficient estimation of data compression ratios Jan 1, 2013 Issued
Array ( [id] => 9203110 [patent_doc_number] => 20140002287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'Circuit and Method' [patent_app_type] => utility [patent_app_number] => 13/976649 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11587 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976649 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976649
Circuit and method Dec 19, 2012 Issued
Array ( [id] => 10105558 [patent_doc_number] => 09141339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Delta-modulation signal processors: linear, nonlinear and mixed' [patent_app_type] => utility [patent_app_number] => 13/694560 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 4166 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13694560 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/694560
Delta-modulation signal processors: linear, nonlinear and mixed Dec 11, 2012 Issued
Array ( [id] => 9428616 [patent_doc_number] => 08704697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Integration and analog to digital conversion circuit with common capacitors and operating method thereof' [patent_app_type] => utility [patent_app_number] => 13/689931 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 17112 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689931 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689931
Integration and analog to digital conversion circuit with common capacitors and operating method thereof Nov 29, 2012 Issued
Array ( [id] => 8839505 [patent_doc_number] => 20130135133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'Integration and Analog to Digital Conversion Circuit With Common Capacitors and Operating Method Thereof' [patent_app_type] => utility [patent_app_number] => 13/689870 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 17010 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689870 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/689870
Integration and analog to digital conversion circuit with common capacitors and operating method thereof Nov 29, 2012 Issued
Array ( [id] => 9510423 [patent_doc_number] => 20140146914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'Digital to Analog Converter Comprising Mixer' [patent_app_type] => utility [patent_app_number] => 13/688980 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4627 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688980 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688980
Digital to analog converter comprising mixer Nov 28, 2012 Issued
Array ( [id] => 9510421 [patent_doc_number] => 20140146913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'Capacitive Digital to Analog Converter' [patent_app_type] => utility [patent_app_number] => 13/688867 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688867 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688867
Capacitive digital to analog converter Nov 28, 2012 Issued
Array ( [id] => 9428613 [patent_doc_number] => 08704693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-22 [patent_title] => 'Signal interface system and method' [patent_app_type] => utility [patent_app_number] => 13/688309 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688309 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688309
Signal interface system and method Nov 28, 2012 Issued
Array ( [id] => 9356325 [patent_doc_number] => 08674867 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-18 [patent_title] => 'Capacitive radio-frequency digital-to-analog converter with a switched load' [patent_app_type] => utility [patent_app_number] => 13/688662 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688662 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688662
Capacitive radio-frequency digital-to-analog converter with a switched load Nov 28, 2012 Issued
Array ( [id] => 9287185 [patent_doc_number] => 08643521 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-04 [patent_title] => 'Digital-to-analog converter with greater output resistance' [patent_app_type] => utility [patent_app_number] => 13/688158 [patent_app_country] => US [patent_app_date] => 2012-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2936 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688158 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688158
Digital-to-analog converter with greater output resistance Nov 27, 2012 Issued
Array ( [id] => 9240167 [patent_doc_number] => 08604962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-10 [patent_title] => 'ADC first stage combining both sample-hold and ADC first stage analog-to-digital conversion functions' [patent_app_type] => utility [patent_app_number] => 13/688203 [patent_app_country] => US [patent_app_date] => 2012-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 16718 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13688203 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/688203
ADC first stage combining both sample-hold and ADC first stage analog-to-digital conversion functions Nov 27, 2012 Issued
Array ( [id] => 9553269 [patent_doc_number] => 08760325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Scheme for balancing skew between lanes of high-speed serial digital interface' [patent_app_type] => utility [patent_app_number] => 13/685910 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13685910 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/685910
Scheme for balancing skew between lanes of high-speed serial digital interface Nov 26, 2012 Issued
Array ( [id] => 9287184 [patent_doc_number] => 08643520 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-04 [patent_title] => 'Digital-to-analog converter (DAC) current cell with shadow differential transistors for output impedance compensation' [patent_app_type] => utility [patent_app_number] => 13/685883 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13685883 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/685883
Digital-to-analog converter (DAC) current cell with shadow differential transistors for output impedance compensation Nov 26, 2012 Issued
Array ( [id] => 9167627 [patent_doc_number] => 08593310 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-26 [patent_title] => 'Data-driven variable length encoding of fixed-length data' [patent_app_type] => utility [patent_app_number] => 13/686815 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4245 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686815
Data-driven variable length encoding of fixed-length data Nov 26, 2012 Issued
Array ( [id] => 9576421 [patent_doc_number] => 08766840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'System and method for a high resolution digital input class D amplifier with feedback' [patent_app_type] => utility [patent_app_number] => 13/685185 [patent_app_country] => US [patent_app_date] => 2012-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5333 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13685185 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/685185
System and method for a high resolution digital input class D amplifier with feedback Nov 25, 2012 Issued
Array ( [id] => 9583294 [patent_doc_number] => 08773297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'System and method for pulse width modulation digital-to-analog converter' [patent_app_type] => utility [patent_app_number] => 13/685178 [patent_app_country] => US [patent_app_date] => 2012-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13685178 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/685178
System and method for pulse width modulation digital-to-analog converter Nov 25, 2012 Issued
Array ( [id] => 8974389 [patent_doc_number] => 20130207819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'STABILITY CORRECTION FOR A SHUFFLER OF A SIGMA-DELTA ADC' [patent_app_type] => utility [patent_app_number] => 13/685063 [patent_app_country] => US [patent_app_date] => 2012-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3956 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13685063 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/685063
Stability correction for a shuffler of a Σ-delta ADC Nov 25, 2012 Issued
Array ( [id] => 9267185 [patent_doc_number] => 20140022101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'TIME INTERLEAVED ANALOG TO DIGITAL CONVERTER MISMATCH CORRECTION' [patent_app_type] => utility [patent_app_number] => 13/684031 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4303 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13684031 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/684031
Time interleaved analog to digital converter mismatch correction Nov 20, 2012 Issued
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