Search

David Ton

Examiner (ID: 9677)

Most Active Art Unit
2117
Art Unit(s)
2317, 2138, 2782, 2784, 2133, 2117
Total Applications
1397
Issued Applications
1294
Pending Applications
31
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11294481 [patent_doc_number] => 20160344413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'DATA DEDUPLICATION WITH ADAPTIVE ERASURE CODE REDUNDANCY' [patent_app_type] => utility [patent_app_number] => 15/227285 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227285 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227285
Data deduplication with adaptive erasure code redundancy Aug 2, 2016 Issued
Array ( [id] => 11294481 [patent_doc_number] => 20160344413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'DATA DEDUPLICATION WITH ADAPTIVE ERASURE CODE REDUNDANCY' [patent_app_type] => utility [patent_app_number] => 15/227285 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227285 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227285
Data deduplication with adaptive erasure code redundancy Aug 2, 2016 Issued
Array ( [id] => 11489976 [patent_doc_number] => 09596054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-14 [patent_title] => 'Optical fiber signal quality measuring and reporting in aviation systems and related method' [patent_app_type] => utility [patent_app_number] => 15/172962 [patent_app_country] => US [patent_app_date] => 2016-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15172962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/172962
Optical fiber signal quality measuring and reporting in aviation systems and related method Jun 2, 2016 Issued
Array ( [id] => 11661741 [patent_doc_number] => 09674766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Data throughput for cell-edge users in a LTE network using down-link repeaters and up link HARQ relays' [patent_app_type] => utility [patent_app_number] => 15/067302 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 10559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067302 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067302
Data throughput for cell-edge users in a LTE network using down-link repeaters and up link HARQ relays Mar 10, 2016 Issued
Array ( [id] => 10994136 [patent_doc_number] => 20160191082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'PARALLEL BIT INTERLEAVER' [patent_app_type] => utility [patent_app_number] => 15/063865 [patent_app_country] => US [patent_app_date] => 2016-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 17620 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063865 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/063865
Parallel bit interleaver Mar 7, 2016 Issued
Array ( [id] => 11503771 [patent_doc_number] => 20170077957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD' [patent_app_type] => utility [patent_app_number] => 15/058265 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6692 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058265 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058265
ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD Mar 1, 2016 Abandoned
Array ( [id] => 11481639 [patent_doc_number] => 09588177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-07 [patent_title] => 'Optimizing generation of test configurations for built-in self-testing' [patent_app_type] => utility [patent_app_number] => 14/987849 [patent_app_country] => US [patent_app_date] => 2016-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14987849 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/987849
Optimizing generation of test configurations for built-in self-testing Jan 4, 2016 Issued
Array ( [id] => 10771955 [patent_doc_number] => 20160118111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-28 [patent_title] => 'REDUCED LEVEL CELL MODE FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/984491 [patent_app_country] => US [patent_app_date] => 2015-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 37722 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14984491 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/984491
Reduced level cell mode for non-volatile memory Dec 29, 2015 Issued
Array ( [id] => 11700738 [patent_doc_number] => 09690654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Operation method of nonvolatile memory system' [patent_app_type] => utility [patent_app_number] => 14/979971 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 14706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14979971 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/979971
Operation method of nonvolatile memory system Dec 27, 2015 Issued
Array ( [id] => 11644913 [patent_doc_number] => 09666302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-30 [patent_title] => 'System and method for memory scan design-for-test' [patent_app_type] => utility [patent_app_number] => 14/980390 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9003 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14980390 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/980390
System and method for memory scan design-for-test Dec 27, 2015 Issued
Array ( [id] => 10739472 [patent_doc_number] => 20160085623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'SYSTEMS AND METHODS FOR SOFT DATA UTILIZATION IN A SOLID STATE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/956162 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5298 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956162 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956162
Systems and methods for soft data utilization in a solid state memory system Nov 30, 2015 Issued
Array ( [id] => 11232732 [patent_doc_number] => 09459961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 14/947099 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5085 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947099 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947099
Magnetic random access memory Nov 19, 2015 Issued
Array ( [id] => 11644050 [patent_doc_number] => 09665426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Semiconductor device and reading method' [patent_app_type] => utility [patent_app_number] => 14/945932 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 11161 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945932 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/945932
Semiconductor device and reading method Nov 18, 2015 Issued
Array ( [id] => 11366056 [patent_doc_number] => 20170004036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'FLASH MEMORY SYSTEM AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/945623 [patent_app_country] => US [patent_app_date] => 2015-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 25707 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945623 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/945623
Flash memory system and operating method thereof Nov 18, 2015 Issued
Array ( [id] => 11410079 [patent_doc_number] => 09557379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/943168 [patent_app_country] => US [patent_app_date] => 2015-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5543 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943168 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/943168
Semiconductor integrated circuit Nov 16, 2015 Issued
Array ( [id] => 10659349 [patent_doc_number] => 20160005493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'METHODS AND APPARATUS FOR TESTING AND REPAIRING DIGITAL MEMORY CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/856758 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 7731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856758 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856758
Methods and apparatus for testing and repairing digital memory circuits Sep 16, 2015 Issued
Array ( [id] => 11503769 [patent_doc_number] => 20170077955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'MULTI CHANNEL MEMORY WITH FLEXIBLE CODE-LENGTH ECC' [patent_app_type] => utility [patent_app_number] => 14/852232 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14852232 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/852232
Multi channel memory with flexible code-length ECC Sep 10, 2015 Issued
Array ( [id] => 10739475 [patent_doc_number] => 20160085626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'DECODING DEVICE, DECODING METHOD, AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/847576 [patent_app_country] => US [patent_app_date] => 2015-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16382 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14847576 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/847576
Decoding device, decoding method, and memory system Sep 7, 2015 Issued
Array ( [id] => 10739475 [patent_doc_number] => 20160085626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'DECODING DEVICE, DECODING METHOD, AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/847576 [patent_app_country] => US [patent_app_date] => 2015-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 16382 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14847576 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/847576
Decoding device, decoding method, and memory system Sep 7, 2015 Issued
Array ( [id] => 11070007 [patent_doc_number] => 20160266971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'MEMORY SYSTEM, MEMORY CONTROLLER AND MEMORY CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/845875 [patent_app_country] => US [patent_app_date] => 2015-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14845875 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/845875
MEMORY SYSTEM, MEMORY CONTROLLER AND MEMORY CONTROL METHOD Sep 3, 2015 Abandoned
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