
David Ton
Examiner (ID: 2768, Phone: (571)272-3828 , Office: P/2117 )
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2782, 2117, 2784, 2317, 2133, 2138 |
| Total Applications | 1397 |
| Issued Applications | 1295 |
| Pending Applications | 31 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9926374
[patent_doc_number] => 08984360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-17
[patent_title] => 'Data quality analysis and management system'
[patent_app_type] => utility
[patent_app_number] => 13/601729
[patent_app_country] => US
[patent_app_date] => 2012-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6799
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601729
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/601729 | Data quality analysis and management system | Aug 30, 2012 | Issued |
Array
(
[id] => 9829421
[patent_doc_number] => 08938658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-20
[patent_title] => 'Statistical read comparison signal generation for memory systems'
[patent_app_type] => utility
[patent_app_number] => 13/602031
[patent_app_country] => US
[patent_app_date] => 2012-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 16539
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602031
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/602031 | Statistical read comparison signal generation for memory systems | Aug 30, 2012 | Issued |
Array
(
[id] => 8518046
[patent_doc_number] => 20120317453
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-13
[patent_title] => 'POSITION INDEPENDENT TESTING OF CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 13/589778
[patent_app_country] => US
[patent_app_date] => 2012-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 27340
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589778
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/589778 | Scan collector and parallel scan paths with controlled output buffer | Aug 19, 2012 | Issued |
Array
(
[id] => 8552322
[patent_doc_number] => 08327221
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-12-04
[patent_title] => 'Overlapping sub-matrix based LDPC (low density parity check) decoder'
[patent_app_type] => utility
[patent_app_number] => 13/549577
[patent_app_country] => US
[patent_app_date] => 2012-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 30
[patent_no_of_words] => 14801
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13549577
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/549577 | Overlapping sub-matrix based LDPC (low density parity check) decoder | Jul 15, 2012 | Issued |
Array
(
[id] => 9548727
[patent_doc_number] => 20140173375
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'LDPC ENCODING/DECODING METHOD AND DEVICE USING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/234714
[patent_app_country] => US
[patent_app_date] => 2012-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7788
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14234714
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/234714 | LDPC encoding/decoding method and device using same | Jul 11, 2012 | Issued |
Array
(
[id] => 8463943
[patent_doc_number] => 20120269112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-25
[patent_title] => 'Method and System for Improving Performance of Broadcast/Multicast Transmissions'
[patent_app_type] => utility
[patent_app_number] => 13/544528
[patent_app_country] => US
[patent_app_date] => 2012-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7745
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13544528
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/544528 | Method and system for improving performance of broadcast/multicast transmissions | Jul 8, 2012 | Issued |
Array
(
[id] => 9143495
[patent_doc_number] => 08583977
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Method and system for reliable data transfer'
[patent_app_type] => utility
[patent_app_number] => 13/540404
[patent_app_country] => US
[patent_app_date] => 2012-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 16906
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13540404
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/540404 | Method and system for reliable data transfer | Jul 1, 2012 | Issued |
Array
(
[id] => 9527607
[patent_doc_number] => 08751898
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'Utilizing error correcting code data associated with a region of memory'
[patent_app_type] => utility
[patent_app_number] => 13/534053
[patent_app_country] => US
[patent_app_date] => 2012-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5658
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13534053
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/534053 | Utilizing error correcting code data associated with a region of memory | Jun 26, 2012 | Issued |
Array
(
[id] => 9765952
[patent_doc_number] => 08850298
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-30
[patent_title] => 'Combined Koetter-Vardy and Chase decoding of cyclic codes'
[patent_app_type] => utility
[patent_app_number] => 13/534287
[patent_app_country] => US
[patent_app_date] => 2012-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10610
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13534287
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/534287 | Combined Koetter-Vardy and Chase decoding of cyclic codes | Jun 26, 2012 | Issued |
Array
(
[id] => 9264869
[patent_doc_number] => 20130346798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-26
[patent_title] => 'CODEWORD ERROR INJECTION VIA CHECKBIT MODIFICATION'
[patent_app_type] => utility
[patent_app_number] => 13/533645
[patent_app_country] => US
[patent_app_date] => 2012-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3771
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533645
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/533645 | Codeword error injection via checkbit modification | Jun 25, 2012 | Issued |
Array
(
[id] => 8588690
[patent_doc_number] => 20130007510
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-03
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING REDUNDANT SELECT LINE TO REPLACE REGULAR SELECT LINE'
[patent_app_type] => utility
[patent_app_number] => 13/533583
[patent_app_country] => US
[patent_app_date] => 2012-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 11084
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533583
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/533583 | Semiconductor device having redundant select line to replace regular select line | Jun 25, 2012 | Issued |
Array
(
[id] => 8455099
[patent_doc_number] => 20120266046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-18
[patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR USING MULTI-LEVEL CELL SOLID-STATE STORAGE AS SINGLE-LEVEL CELL SOLID-STATE STORAGE'
[patent_app_type] => utility
[patent_app_number] => 13/531240
[patent_app_country] => US
[patent_app_date] => 2012-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13574
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13531240
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/531240 | Apparatus, system, and method for using multi-level cell solid-state storage as single level cell solid-state storage | Jun 21, 2012 | Issued |
Array
(
[id] => 8466941
[patent_doc_number] => 20120272109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-25
[patent_title] => 'VOTER TESTER FOR REDUNDANT SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/531302
[patent_app_country] => US
[patent_app_date] => 2012-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3378
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13531302
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/531302 | Voter tester for redundant systems | Jun 21, 2012 | Issued |
Array
(
[id] => 8407925
[patent_doc_number] => 20120239994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-20
[patent_title] => 'IP CORE DESIGN SUPPORTING USER-ADDED SCAN REGISTER OPTION'
[patent_app_type] => utility
[patent_app_number] => 13/486138
[patent_app_country] => US
[patent_app_date] => 2012-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3594
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486138
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/486138 | Signal connections extending from the periphery of an IP core | May 31, 2012 | Issued |
Array
(
[id] => 10060681
[patent_doc_number] => 09100049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-04
[patent_title] => 'Parallel bit interleaver'
[patent_app_type] => utility
[patent_app_number] => 14/115760
[patent_app_country] => US
[patent_app_date] => 2012-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 56
[patent_no_of_words] => 17632
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14115760
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/115760 | Parallel bit interleaver | May 17, 2012 | Issued |
Array
(
[id] => 8485169
[patent_doc_number] => 20120284577
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => 'ARCHITECTURE, SYSTEM, METHOD, AND COMPUTER-ACCESSIBLE MEDIUM FOR ELIMINATING SCAN PERFORMANCE PENALTY'
[patent_app_type] => utility
[patent_app_number] => 13/462139
[patent_app_country] => US
[patent_app_date] => 2012-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5848
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462139
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/462139 | Architecture, system, method, and computer-accessible medium for eliminating scan performance penalty | May 1, 2012 | Issued |
Array
(
[id] => 9444270
[patent_doc_number] => 08713406
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-29
[patent_title] => 'Erasing a non-volatile memory (NVM) system having error correction code (ECC)'
[patent_app_type] => utility
[patent_app_number] => 13/459344
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4317
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459344
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459344 | Erasing a non-volatile memory (NVM) system having error correction code (ECC) | Apr 29, 2012 | Issued |
Array
(
[id] => 9123875
[patent_doc_number] => 20130290797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'NON-VOLATILE MEMORY (NVM) RESET SEQUENCE WITH BUILT-IN READ CHECK'
[patent_app_type] => utility
[patent_app_number] => 13/459500
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4934
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459500
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459500 | Non-volatile memory (NVM) reset sequence with built-in read check | Apr 29, 2012 | Issued |
Array
(
[id] => 9123877
[patent_doc_number] => 20130290799
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'SCAN TEST CIRCUITRY WITH SELECTABLE TRANSITION LAUNCH MODE'
[patent_app_type] => utility
[patent_app_number] => 13/459424
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6838
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459424
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459424 | Scan test circuitry with selectable transition launch mode | Apr 29, 2012 | Issued |
Array
(
[id] => 9123876
[patent_doc_number] => 20130290798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'Systems and Methods for Short Media Defect Detection Using Non-Binary Coded Information'
[patent_app_type] => utility
[patent_app_number] => 13/459289
[patent_app_country] => US
[patent_app_date] => 2012-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8261
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459289
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/459289 | Systems and methods for short media defect detection using non-binary coded information | Apr 29, 2012 | Issued |