
David Ton
Examiner (ID: 2768, Phone: (571)272-3828 , Office: P/2117 )
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2782, 2117, 2784, 2317, 2133, 2138 |
| Total Applications | 1397 |
| Issued Applications | 1295 |
| Pending Applications | 31 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 379127
[patent_doc_number] => 07313740
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[patent_title] => 'Internally generating patterns for testing in an integrated circuit device'
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Array
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[patent_title] => 'Test circuit and circuit test method'
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[patent_title] => 'Apparatus and method for eliminating the TMS connection in a JTAG procedure'
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Array
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Array
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Array
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[patent_title] => 'Bit error rate performance estimation and control'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/068908 | Scan flip-flop circuit with reduced power consumption | Mar 1, 2005 | Issued |
Array
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[patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method'
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Array
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Array
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Array
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Array
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