Search

David Ton

Examiner (ID: 2768, Phone: (571)272-3828 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2782, 2117, 2784, 2317, 2133, 2138
Total Applications
1397
Issued Applications
1295
Pending Applications
31
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1567677 [patent_doc_number] => 06363506 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Method for self-testing integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/291448 [patent_app_country] => US [patent_app_date] => 1999-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8041 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363506.pdf [firstpage_image] =>[orig_patent_app_number] => 09291448 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/291448
Method for self-testing integrated circuits Apr 12, 1999 Issued
Array ( [id] => 1466776 [patent_doc_number] => 06351837 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'High speed built-in self-test circuit for DRAMS' [patent_app_type] => B1 [patent_app_number] => 09/290384 [patent_app_country] => US [patent_app_date] => 1999-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3159 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351837.pdf [firstpage_image] =>[orig_patent_app_number] => 09290384 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/290384
High speed built-in self-test circuit for DRAMS Apr 11, 1999 Issued
Array ( [id] => 1462545 [patent_doc_number] => 06427221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Self-organizing rolling mill system importing neighbor constraint ranges' [patent_app_type] => B1 [patent_app_number] => 09/290455 [patent_app_country] => US [patent_app_date] => 1999-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5705 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427221.pdf [firstpage_image] =>[orig_patent_app_number] => 09290455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/290455
Self-organizing rolling mill system importing neighbor constraint ranges Apr 11, 1999 Issued
Array ( [id] => 1526588 [patent_doc_number] => 06353910 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage' [patent_app_type] => B1 [patent_app_number] => 09/289336 [patent_app_country] => US [patent_app_date] => 1999-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2071 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353910.pdf [firstpage_image] =>[orig_patent_app_number] => 09289336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/289336
Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage Apr 8, 1999 Issued
Array ( [id] => 1186010 [patent_doc_number] => 06745355 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/283973 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7598 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745355.pdf [firstpage_image] =>[orig_patent_app_number] => 09283973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283973
Semiconductor integrated circuit Mar 31, 1999 Issued
Array ( [id] => 1501723 [patent_doc_number] => 06405333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Fail array memory control circuit with selective input disable' [patent_app_type] => B1 [patent_app_number] => 09/282224 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2838 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405333.pdf [firstpage_image] =>[orig_patent_app_number] => 09282224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/282224
Fail array memory control circuit with selective input disable Mar 30, 1999 Issued
Array ( [id] => 7622301 [patent_doc_number] => 06687865 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'On-chip service processor for test and debug of integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/275726 [patent_app_country] => US [patent_app_date] => 1999-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 9155 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687865.pdf [firstpage_image] =>[orig_patent_app_number] => 09275726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/275726
On-chip service processor for test and debug of integrated circuits Mar 23, 1999 Issued
Array ( [id] => 1549809 [patent_doc_number] => 06374381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Semiconductor memory device, and method of checking the semiconductor device and method of using the same' [patent_app_type] => B1 [patent_app_number] => 09/271331 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9649 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374381.pdf [firstpage_image] =>[orig_patent_app_number] => 09271331 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271331
Semiconductor memory device, and method of checking the semiconductor device and method of using the same Mar 17, 1999 Issued
Array ( [id] => 7613775 [patent_doc_number] => 06898756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'System and method for enabling efficient error correction and encryption using wavelet transforms over finite fields' [patent_app_type] => utility [patent_app_number] => 09/268555 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5192 [patent_no_of_claims] => 100 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898756.pdf [firstpage_image] =>[orig_patent_app_number] => 09268555 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/268555
System and method for enabling efficient error correction and encryption using wavelet transforms over finite fields Mar 14, 1999 Issued
Array ( [id] => 4392617 [patent_doc_number] => 06289481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Multi-value type semiconductor memory device and its defect removal method' [patent_app_type] => 1 [patent_app_number] => 9/263209 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4230 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289481.pdf [firstpage_image] =>[orig_patent_app_number] => 263209 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/263209
Multi-value type semiconductor memory device and its defect removal method Mar 4, 1999 Issued
Array ( [id] => 1438784 [patent_doc_number] => 06357033 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Communication processing control apparatus and information processing system having the same' [patent_app_type] => B1 [patent_app_number] => 09/262337 [patent_app_country] => US [patent_app_date] => 1999-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2917 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/357/06357033.pdf [firstpage_image] =>[orig_patent_app_number] => 09262337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/262337
Communication processing control apparatus and information processing system having the same Mar 3, 1999 Issued
Array ( [id] => 1402024 [patent_doc_number] => 06564345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method' [patent_app_type] => B1 [patent_app_number] => 09/259297 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5417 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564345.pdf [firstpage_image] =>[orig_patent_app_number] => 09259297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259297
Method for creating defect management information in an recording medium, and apparatus and medium based on said method Feb 28, 1999 Issued
Array ( [id] => 1402024 [patent_doc_number] => 06564345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method for creating defect management information in an recording medium, and apparatus and medium based on said method' [patent_app_type] => B1 [patent_app_number] => 09/259297 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5417 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564345.pdf [firstpage_image] =>[orig_patent_app_number] => 09259297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259297
Method for creating defect management information in an recording medium, and apparatus and medium based on said method Feb 28, 1999 Issued
09/117309 KEY EQUATION SOLVER CIRCUIT AND REED-SOLOMON DECODER COMPRISING SAME Feb 28, 1999 Abandoned
Array ( [id] => 1501730 [patent_doc_number] => 06405335 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Position independent testing of circuits' [patent_app_type] => B1 [patent_app_number] => 09/257760 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 52 [patent_no_of_words] => 27103 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405335.pdf [firstpage_image] =>[orig_patent_app_number] => 09257760 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257760
Position independent testing of circuits Feb 24, 1999 Issued
Array ( [id] => 1466491 [patent_doc_number] => 06393591 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method for remotely testing microelectronic device over the internet' [patent_app_type] => B1 [patent_app_number] => 09/249907 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393591.pdf [firstpage_image] =>[orig_patent_app_number] => 09249907 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249907
Method for remotely testing microelectronic device over the internet Feb 11, 1999 Issued
Array ( [id] => 4427346 [patent_doc_number] => 06226769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Forward error correction system for packet based real time media' [patent_app_type] => 1 [patent_app_number] => 9/243955 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5209 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226769.pdf [firstpage_image] =>[orig_patent_app_number] => 243955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243955
Forward error correction system for packet based real time media Feb 2, 1999 Issued
Array ( [id] => 1424001 [patent_doc_number] => 06539504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Memory system having error monitoring apparatus for multi-bit errors' [patent_app_type] => B1 [patent_app_number] => 09/230757 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4378 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/539/06539504.pdf [firstpage_image] =>[orig_patent_app_number] => 09230757 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/230757
Memory system having error monitoring apparatus for multi-bit errors Jan 31, 1999 Issued
Array ( [id] => 1557412 [patent_doc_number] => 06349398 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Method and apparatus for partial-scan built-in self test logic' [patent_app_type] => B1 [patent_app_number] => 09/237486 [patent_app_country] => US [patent_app_date] => 1999-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7655 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349398.pdf [firstpage_image] =>[orig_patent_app_number] => 09237486 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/237486
Method and apparatus for partial-scan built-in self test logic Jan 25, 1999 Issued
09/237769 BUILT-IN SELF REPAIR CIRCUITRY UTILIZING PERMANENT RECORD OF DEFECTS Jan 25, 1999 Abandoned
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