
David Ton
Examiner (ID: 9677)
| Most Active Art Unit | 2117 |
| Art Unit(s) | 2317, 2138, 2782, 2784, 2133, 2117 |
| Total Applications | 1397 |
| Issued Applications | 1294 |
| Pending Applications | 31 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10105695
[patent_doc_number] => 09141478
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-22
[patent_title] => 'Reconstructive error recovery procedure (ERP) using reserved buffer'
[patent_app_type] => utility
[patent_app_number] => 14/149752
[patent_app_country] => US
[patent_app_date] => 2014-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 11760
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14149752
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/149752 | Reconstructive error recovery procedure (ERP) using reserved buffer | Jan 6, 2014 | Issued |
Array
(
[id] => 10308288
[patent_doc_number] => 20150193288
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'Precursor Adaptation Algorithm for Asynchronously Clocked SERDES'
[patent_app_type] => utility
[patent_app_number] => 14/146904
[patent_app_country] => US
[patent_app_date] => 2014-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9520
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146904
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/146904 | Precursor adaptation algorithm for asynchronously clocked SERDES | Jan 2, 2014 | Issued |
Array
(
[id] => 10125995
[patent_doc_number] => 09160370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-13
[patent_title] => 'Single component correcting ECC using a reducible polynomial with GF(2) coefficients'
[patent_app_type] => utility
[patent_app_number] => 14/146496
[patent_app_country] => US
[patent_app_date] => 2014-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6480
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146496
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/146496 | Single component correcting ECC using a reducible polynomial with GF(2) coefficients | Jan 1, 2014 | Issued |
Array
(
[id] => 10150787
[patent_doc_number] => 09183077
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-10
[patent_title] => 'Data storage apparatus and method for storing data'
[patent_app_type] => utility
[patent_app_number] => 14/143532
[patent_app_country] => US
[patent_app_date] => 2013-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 7504
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14143532
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/143532 | Data storage apparatus and method for storing data | Dec 29, 2013 | Issued |
Array
(
[id] => 10603885
[patent_doc_number] => 09324454
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-26
[patent_title] => 'Data pattern generation for I/O testing of multilevel interfaces'
[patent_app_type] => utility
[patent_app_number] => 14/144432
[patent_app_country] => US
[patent_app_date] => 2013-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 12479
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14144432
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/144432 | Data pattern generation for I/O testing of multilevel interfaces | Dec 29, 2013 | Issued |
Array
(
[id] => 9765948
[patent_doc_number] => 08850297
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-09-30
[patent_title] => 'System and method for multi-dimensional encoding and decoding'
[patent_app_type] => utility
[patent_app_number] => 14/141671
[patent_app_country] => US
[patent_app_date] => 2013-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 17992
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141671
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/141671 | System and method for multi-dimensional encoding and decoding | Dec 26, 2013 | Issued |
Array
(
[id] => 11264850
[patent_doc_number] => 09489147
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Semiconductor device, memory device, and system including the same'
[patent_app_type] => utility
[patent_app_number] => 14/107773
[patent_app_country] => US
[patent_app_date] => 2013-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4623
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14107773
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/107773 | Semiconductor device, memory device, and system including the same | Dec 15, 2013 | Issued |
Array
(
[id] => 11780767
[patent_doc_number] => 09389949
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-07-12
[patent_title] => 'Optical fiber signal quality measuring and reporting in aviation systems and related method'
[patent_app_type] => utility
[patent_app_number] => 14/099696
[patent_app_country] => US
[patent_app_date] => 2013-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10955
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14099696
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/099696 | Optical fiber signal quality measuring and reporting in aviation systems and related method | Dec 5, 2013 | Issued |
Array
(
[id] => 9563897
[patent_doc_number] => 20140181610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-26
[patent_title] => 'BULK DATA TRANSFER'
[patent_app_type] => utility
[patent_app_number] => 14/076767
[patent_app_country] => US
[patent_app_date] => 2013-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 16877
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076767
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/076767 | Bulk data transfer | Nov 10, 2013 | Issued |
Array
(
[id] => 10508269
[patent_doc_number] => 09236145
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-12
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/073404
[patent_app_country] => US
[patent_app_date] => 2013-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8114
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073404
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/073404 | Semiconductor device | Nov 5, 2013 | Issued |
Array
(
[id] => 10071789
[patent_doc_number] => 09110140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-18
[patent_title] => 'Scan circuit, semiconductor device, and method for testing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/072448
[patent_app_country] => US
[patent_app_date] => 2013-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 32
[patent_no_of_words] => 11931
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072448
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/072448 | Scan circuit, semiconductor device, and method for testing semiconductor device | Nov 4, 2013 | Issued |
Array
(
[id] => 10221682
[patent_doc_number] => 20150106675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-16
[patent_title] => 'Systems and Methods for Multi-Algorithm Concatenation Encoding and Decoding'
[patent_app_type] => utility
[patent_app_number] => 14/072604
[patent_app_country] => US
[patent_app_date] => 2013-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8884
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072604
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/072604 | Systems and methods for multi-algorithm concatenation encoding and decoding | Nov 4, 2013 | Issued |
Array
(
[id] => 10171021
[patent_doc_number] => 09201729
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'Systems and methods for soft data utilization in a solid state memory system'
[patent_app_type] => utility
[patent_app_number] => 14/072574
[patent_app_country] => US
[patent_app_date] => 2013-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5284
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072574
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/072574 | Systems and methods for soft data utilization in a solid state memory system | Nov 4, 2013 | Issued |
Array
(
[id] => 10243006
[patent_doc_number] => 20150128001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'Efficient Apparatus and Method for Testing Digital Shadow Logic Around Non-Logic Design Structures'
[patent_app_type] => utility
[patent_app_number] => 14/072295
[patent_app_country] => US
[patent_app_date] => 2013-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9126
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072295
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/072295 | Efficient apparatus and method for testing digital shadow logic around non-logic design structures | Nov 4, 2013 | Issued |
Array
(
[id] => 9308633
[patent_doc_number] => 20140047307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-13
[patent_title] => 'CHECKSUM CALCULATION, PREDICTION AND VALIDATION'
[patent_app_type] => utility
[patent_app_number] => 14/068347
[patent_app_country] => US
[patent_app_date] => 2013-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5457
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068347
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/068347 | Checksum calculation, prediction and validation | Oct 30, 2013 | Issued |
Array
(
[id] => 9912238
[patent_doc_number] => 20150067441
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-05
[patent_title] => 'COMPUTING DEVICE STORING LOOK-UP TABLES FOR COMPUTATION OF A FUNCTION'
[patent_app_type] => utility
[patent_app_number] => 14/396971
[patent_app_country] => US
[patent_app_date] => 2013-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 10847
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14396971
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/396971 | Computing device storing look-up tables for computation of a function | Oct 20, 2013 | Issued |
Array
(
[id] => 9527606
[patent_doc_number] => 08751897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'Distributed system for fault-tolerant data storage'
[patent_app_type] => utility
[patent_app_number] => 14/057394
[patent_app_country] => US
[patent_app_date] => 2013-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5394
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14057394
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/057394 | Distributed system for fault-tolerant data storage | Oct 17, 2013 | Issued |
Array
(
[id] => 9297057
[patent_doc_number] => 20140040691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'POSITION INDEPENDENT TESTING OF CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 14/053167
[patent_app_country] => US
[patent_app_date] => 2013-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 27244
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14053167
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/053167 | Multiplexer coupled to second core output and first core input | Oct 13, 2013 | Issued |
Array
(
[id] => 9532598
[patent_doc_number] => 08756484
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-06-17
[patent_title] => 'Design, decoding and optimized implementation of SECDED codes over GF(q)'
[patent_app_type] => utility
[patent_app_number] => 14/029379
[patent_app_country] => US
[patent_app_date] => 2013-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 5204
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14029379
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/029379 | Design, decoding and optimized implementation of SECDED codes over GF(q) | Sep 16, 2013 | Issued |
Array
(
[id] => 9795038
[patent_doc_number] => 20150006983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-01
[patent_title] => 'READ VOLTAGE SETTING METHOD, AND CONTROL CIRCUIT, AND MEMORY STORAGE APPARATUS USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/018436
[patent_app_country] => US
[patent_app_date] => 2013-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 10123
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14018436
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/018436 | Read voltage setting method, and control circuit, and memory storage apparatus using the same | Sep 4, 2013 | Issued |