Search

David Ton

Examiner (ID: 2768, Phone: (571)272-3828 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2782, 2117, 2784, 2317, 2133, 2138
Total Applications
1397
Issued Applications
1295
Pending Applications
31
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4261192 [patent_doc_number] => 06167552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Apparatus for convolutional self-doubly orthogonal encoding and decoding' [patent_app_type] => 1 [patent_app_number] => 8/942787 [patent_app_country] => US [patent_app_date] => 1997-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3546 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167552.pdf [firstpage_image] =>[orig_patent_app_number] => 942787 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/942787
Apparatus for convolutional self-doubly orthogonal encoding and decoding Oct 1, 1997 Issued
Array ( [id] => 4012836 [patent_doc_number] => 05986986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Method for regenerating synchronizing signal by judging whether or not the extracted synchronizing signal includes the second and third window signals' [patent_app_type] => 1 [patent_app_number] => 8/940183 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 80 [patent_no_of_words] => 15564 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986986.pdf [firstpage_image] =>[orig_patent_app_number] => 940183 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/940183
Method for regenerating synchronizing signal by judging whether or not the extracted synchronizing signal includes the second and third window signals Sep 29, 1997 Issued
Array ( [id] => 3989272 [patent_doc_number] => 05905864 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Method for simultaneously switching data storage devices to be accessed by a first processing device and a second processing device at a predetermined time period' [patent_app_type] => 1 [patent_app_number] => 8/934916 [patent_app_country] => US [patent_app_date] => 1997-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 4771 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905864.pdf [firstpage_image] =>[orig_patent_app_number] => 934916 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/934916
Method for simultaneously switching data storage devices to be accessed by a first processing device and a second processing device at a predetermined time period Sep 21, 1997 Issued
Array ( [id] => 4179857 [patent_doc_number] => 06115836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Scan path circuitry for programming a variable clock pulse width' [patent_app_type] => 1 [patent_app_number] => 8/931989 [patent_app_country] => US [patent_app_date] => 1997-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11725 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115836.pdf [firstpage_image] =>[orig_patent_app_number] => 931989 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/931989
Scan path circuitry for programming a variable clock pulse width Sep 16, 1997 Issued
Array ( [id] => 4121875 [patent_doc_number] => 06023781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program' [patent_app_type] => 1 [patent_app_number] => 8/931519 [patent_app_country] => US [patent_app_date] => 1997-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 15849 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023781.pdf [firstpage_image] =>[orig_patent_app_number] => 931519 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/931519
Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program Sep 15, 1997 Issued
Array ( [id] => 3940022 [patent_doc_number] => 05954821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'System for PCI slots expansion having expansion clock generator providing clock signals wherein propagation delay between the clock generator and each recipient is approximately equal' [patent_app_type] => 1 [patent_app_number] => 8/929624 [patent_app_country] => US [patent_app_date] => 1997-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3166 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/954/05954821.pdf [firstpage_image] =>[orig_patent_app_number] => 929624 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/929624
System for PCI slots expansion having expansion clock generator providing clock signals wherein propagation delay between the clock generator and each recipient is approximately equal Sep 14, 1997 Issued
Array ( [id] => 3984570 [patent_doc_number] => 05887190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'System for determining from a command storing in a storage circuit an application program which has initiated the command to determine an input/output device address' [patent_app_type] => 1 [patent_app_number] => 8/928790 [patent_app_country] => US [patent_app_date] => 1997-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 12288 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887190.pdf [firstpage_image] =>[orig_patent_app_number] => 928790 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/928790
System for determining from a command storing in a storage circuit an application program which has initiated the command to determine an input/output device address Sep 11, 1997 Issued
Array ( [id] => 4178506 [patent_doc_number] => 06108804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method and apparatus for testing adjustment of a circuit parameter' [patent_app_type] => 1 [patent_app_number] => 8/927164 [patent_app_country] => US [patent_app_date] => 1997-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2705 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108804.pdf [firstpage_image] =>[orig_patent_app_number] => 927164 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/927164
Method and apparatus for testing adjustment of a circuit parameter Sep 10, 1997 Issued
Array ( [id] => 3974761 [patent_doc_number] => 05901332 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'System for dynamically reconfiguring subbusses of data bus according to system needs based on monitoring each of the information channels that make up data bus' [patent_app_type] => 1 [patent_app_number] => 8/921078 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3121 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/901/05901332.pdf [firstpage_image] =>[orig_patent_app_number] => 921078 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/921078
System for dynamically reconfiguring subbusses of data bus according to system needs based on monitoring each of the information channels that make up data bus Aug 28, 1997 Issued
Array ( [id] => 3857809 [patent_doc_number] => 05745678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Method and system for the secured distribution of multimedia titles' [patent_app_type] => 1 [patent_app_number] => 8/914911 [patent_app_country] => US [patent_app_date] => 1997-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8130 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745678.pdf [firstpage_image] =>[orig_patent_app_number] => 914911 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/914911
Method and system for the secured distribution of multimedia titles Aug 17, 1997 Issued
Array ( [id] => 4101267 [patent_doc_number] => 06018811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Layout for semiconductor memory device wherein intercoupling lines are shared by two sets of fuse banks and two sets of redundant elements not simultaneously active' [patent_app_type] => 1 [patent_app_number] => 8/911669 [patent_app_country] => US [patent_app_date] => 1997-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9089 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018811.pdf [firstpage_image] =>[orig_patent_app_number] => 911669 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/911669
Layout for semiconductor memory device wherein intercoupling lines are shared by two sets of fuse banks and two sets of redundant elements not simultaneously active Aug 13, 1997 Issued
Array ( [id] => 4147169 [patent_doc_number] => 06128681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Serial to parallel and parallel to serial, converter for a digital audio workstation' [patent_app_type] => 1 [patent_app_number] => 8/908238 [patent_app_country] => US [patent_app_date] => 1997-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10935 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128681.pdf [firstpage_image] =>[orig_patent_app_number] => 908238 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/908238
Serial to parallel and parallel to serial, converter for a digital audio workstation Aug 6, 1997 Issued
Array ( [id] => 4109657 [patent_doc_number] => 06134612 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'External modular bay for housing I/O devices' [patent_app_type] => 1 [patent_app_number] => 8/905912 [patent_app_country] => US [patent_app_date] => 1997-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 144 [patent_figures_cnt] => 198 [patent_no_of_words] => 43372 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134612.pdf [firstpage_image] =>[orig_patent_app_number] => 905912 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/905912
External modular bay for housing I/O devices Aug 3, 1997 Issued
Array ( [id] => 4310918 [patent_doc_number] => 06212654 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Coded modulation for digital storage in analog memory devices' [patent_app_type] => 1 [patent_app_number] => 8/898441 [patent_app_country] => US [patent_app_date] => 1997-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9984 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212654.pdf [firstpage_image] =>[orig_patent_app_number] => 898441 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/898441
Coded modulation for digital storage in analog memory devices Jul 21, 1997 Issued
Array ( [id] => 3919302 [patent_doc_number] => 05898891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method for transferring data directly between the first and second data storage devices without transferring data to the memory array or over the input-output bus' [patent_app_type] => 1 [patent_app_number] => 8/896744 [patent_app_country] => US [patent_app_date] => 1997-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5373 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898891.pdf [firstpage_image] =>[orig_patent_app_number] => 896744 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/896744
Method for transferring data directly between the first and second data storage devices without transferring data to the memory array or over the input-output bus Jul 17, 1997 Issued
Array ( [id] => 4374779 [patent_doc_number] => 06175944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Methods and apparatus for packetizing data for transmission through an erasure broadcast channel' [patent_app_type] => 1 [patent_app_number] => 8/892855 [patent_app_country] => US [patent_app_date] => 1997-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3022 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175944.pdf [firstpage_image] =>[orig_patent_app_number] => 892855 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/892855
Methods and apparatus for packetizing data for transmission through an erasure broadcast channel Jul 14, 1997 Issued
08/860893 SERIAL PERIPHERAL INTERFACE Jul 10, 1997 Abandoned
Array ( [id] => 3827108 [patent_doc_number] => 05832299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'System for emulating input/output devices utilizing processor with virtual system mode by allowing mode interpreters to operate concurrently on different segment registers' [patent_app_type] => 1 [patent_app_number] => 8/882823 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11512 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832299.pdf [firstpage_image] =>[orig_patent_app_number] => 882823 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/882823
System for emulating input/output devices utilizing processor with virtual system mode by allowing mode interpreters to operate concurrently on different segment registers Jun 25, 1997 Issued
Array ( [id] => 4161881 [patent_doc_number] => 06032201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Plug and play system using proxy for retrieving correct information about current device from system registry when current device is not the newly installed device' [patent_app_type] => 1 [patent_app_number] => 8/878936 [patent_app_country] => US [patent_app_date] => 1997-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/032/06032201.pdf [firstpage_image] =>[orig_patent_app_number] => 878936 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/878936
Plug and play system using proxy for retrieving correct information about current device from system registry when current device is not the newly installed device Jun 18, 1997 Issued
Array ( [id] => 3915267 [patent_doc_number] => 05944799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'State machine bus controller providing function and timing parameters to satisfy requirements of asynchronous bus and more than one type of device on the bus' [patent_app_type] => 1 [patent_app_number] => 8/876926 [patent_app_country] => US [patent_app_date] => 1997-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4729 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944799.pdf [firstpage_image] =>[orig_patent_app_number] => 876926 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/876926
State machine bus controller providing function and timing parameters to satisfy requirements of asynchronous bus and more than one type of device on the bus Jun 15, 1997 Issued
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