Search

David Ton

Examiner (ID: 2768, Phone: (571)272-3828 , Office: P/2117 )

Most Active Art Unit
2117
Art Unit(s)
2782, 2117, 2784, 2317, 2133, 2138
Total Applications
1397
Issued Applications
1295
Pending Applications
31
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4332796 [patent_doc_number] => 06332153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Apparatus and method for multi-station conferencing' [patent_app_type] => 1 [patent_app_number] => 8/688959 [patent_app_country] => US [patent_app_date] => 1996-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3000 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/332/06332153.pdf [firstpage_image] =>[orig_patent_app_number] => 688959 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/688959
Apparatus and method for multi-station conferencing Jul 30, 1996 Issued
Array ( [id] => 3951773 [patent_doc_number] => 05940628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Control processor for user setting a change prohibition period during which a program change command will not be executed until the lapse of that period' [patent_app_type] => 1 [patent_app_number] => 8/684812 [patent_app_country] => US [patent_app_date] => 1996-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4084 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940628.pdf [firstpage_image] =>[orig_patent_app_number] => 684812 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684812
Control processor for user setting a change prohibition period during which a program change command will not be executed until the lapse of that period Jul 21, 1996 Issued
Array ( [id] => 3952612 [patent_doc_number] => 05873000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'System incorporating hot docking and undocking capabilities without requiring a standby or suspend mode by placing local arbiters of system and base into idle state' [patent_app_type] => 1 [patent_app_number] => 8/684255 [patent_app_country] => US [patent_app_date] => 1996-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11278 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/873/05873000.pdf [firstpage_image] =>[orig_patent_app_number] => 684255 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684255
System incorporating hot docking and undocking capabilities without requiring a standby or suspend mode by placing local arbiters of system and base into idle state Jul 18, 1996 Issued
Array ( [id] => 3762892 [patent_doc_number] => 05802399 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Data transfer control unit for reducing memory requirements in an information processor by converting bit width of data being transferred between memory and processing parts' [patent_app_type] => 1 [patent_app_number] => 8/679147 [patent_app_country] => US [patent_app_date] => 1996-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 10797 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802399.pdf [firstpage_image] =>[orig_patent_app_number] => 679147 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/679147
Data transfer control unit for reducing memory requirements in an information processor by converting bit width of data being transferred between memory and processing parts Jul 11, 1996 Issued
08/676948 METHOD AND APPARATUS FOR SHARING SAME I/O PORT IN AN ELECTRONIC DEVICE Jul 7, 1996 Abandoned
Array ( [id] => 4069831 [patent_doc_number] => 05864671 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Hybrid memory access protocol for servicing memory access request by ascertaining whether the memory block is currently cached in determining which protocols to be used' [patent_app_type] => 1 [patent_app_number] => 8/673957 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11998 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864671.pdf [firstpage_image] =>[orig_patent_app_number] => 673957 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673957
Hybrid memory access protocol for servicing memory access request by ascertaining whether the memory block is currently cached in determining which protocols to be used Jun 30, 1996 Issued
Array ( [id] => 3898600 [patent_doc_number] => 05805928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Burst length detection circuit for detecting a burst end time point and generating a burst mode signal without using a conventional burst length detection counter' [patent_app_type] => 1 [patent_app_number] => 8/670842 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4520 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805928.pdf [firstpage_image] =>[orig_patent_app_number] => 670842 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/670842
Burst length detection circuit for detecting a burst end time point and generating a burst mode signal without using a conventional burst length detection counter Jun 27, 1996 Issued
Array ( [id] => 4008659 [patent_doc_number] => 05920734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'System for providing electrical power to a computer input device according to the interface types through the shared use of wires and a voltage clamp' [patent_app_type] => 1 [patent_app_number] => 8/667402 [patent_app_country] => US [patent_app_date] => 1996-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8437 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920734.pdf [firstpage_image] =>[orig_patent_app_number] => 667402 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667402
System for providing electrical power to a computer input device according to the interface types through the shared use of wires and a voltage clamp Jun 20, 1996 Issued
Array ( [id] => 4015249 [patent_doc_number] => 05923901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'System for transferring data in parallel to host computer using both of the rising and falling edges of host busy signals as transfer instruction signals' [patent_app_type] => 1 [patent_app_number] => 8/663873 [patent_app_country] => US [patent_app_date] => 1996-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7219 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923901.pdf [firstpage_image] =>[orig_patent_app_number] => 663873 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/663873
System for transferring data in parallel to host computer using both of the rising and falling edges of host busy signals as transfer instruction signals Jun 18, 1996 Issued
Array ( [id] => 4082210 [patent_doc_number] => 05867733 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Mass data storage controller permitting data to be directly transferred between storage devices without transferring data to main memory and without transferring data over input-output bus' [patent_app_type] => 1 [patent_app_number] => 8/657968 [patent_app_country] => US [patent_app_date] => 1996-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5373 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/867/05867733.pdf [firstpage_image] =>[orig_patent_app_number] => 657968 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/657968
Mass data storage controller permitting data to be directly transferred between storage devices without transferring data to main memory and without transferring data over input-output bus Jun 3, 1996 Issued
Array ( [id] => 3989971 [patent_doc_number] => 05905910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'System for multi-threaded disk drive operation in a computer system using an interrupt processor software module analyzing and processing interrupt signals to control data transfer' [patent_app_type] => 1 [patent_app_number] => 8/657601 [patent_app_country] => US [patent_app_date] => 1996-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7935 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905910.pdf [firstpage_image] =>[orig_patent_app_number] => 657601 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/657601
System for multi-threaded disk drive operation in a computer system using an interrupt processor software module analyzing and processing interrupt signals to control data transfer May 30, 1996 Issued
Array ( [id] => 3762862 [patent_doc_number] => 05802397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'System for storage protection from unintended I/O access using I/O protection key by providing no control by I/O key entries over access by CP entity' [patent_app_type] => 1 [patent_app_number] => 8/652197 [patent_app_country] => US [patent_app_date] => 1996-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 10443 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802397.pdf [firstpage_image] =>[orig_patent_app_number] => 652197 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652197
System for storage protection from unintended I/O access using I/O protection key by providing no control by I/O key entries over access by CP entity May 22, 1996 Issued
Array ( [id] => 4029871 [patent_doc_number] => 05907684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Independent channel coupled to be shared by multiple physical processing nodes with each node characterized as having its own memory, CPU and operating system image' [patent_app_type] => 1 [patent_app_number] => 8/652177 [patent_app_country] => US [patent_app_date] => 1996-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5913 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907684.pdf [firstpage_image] =>[orig_patent_app_number] => 652177 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652177
Independent channel coupled to be shared by multiple physical processing nodes with each node characterized as having its own memory, CPU and operating system image May 22, 1996 Issued
Array ( [id] => 3756346 [patent_doc_number] => 05787309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Apparatus for protecting storage blocks from being accessed by unwanted I/O programs using I/O program keys and I/O storage keys having M number of bits' [patent_app_type] => 1 [patent_app_number] => 8/652392 [patent_app_country] => US [patent_app_date] => 1996-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 10431 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787309.pdf [firstpage_image] =>[orig_patent_app_number] => 652392 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652392
Apparatus for protecting storage blocks from being accessed by unwanted I/O programs using I/O program keys and I/O storage keys having M number of bits May 22, 1996 Issued
Array ( [id] => 3761392 [patent_doc_number] => 05802305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'System for remotely waking a sleeping computer in power down state by comparing incoming packet to the list of packets storing on network interface card' [patent_app_type] => 1 [patent_app_number] => 8/649452 [patent_app_country] => US [patent_app_date] => 1996-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5666 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802305.pdf [firstpage_image] =>[orig_patent_app_number] => 649452 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649452
System for remotely waking a sleeping computer in power down state by comparing incoming packet to the list of packets storing on network interface card May 16, 1996 Issued
Array ( [id] => 4024062 [patent_doc_number] => 05890016 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Hybrid computer add in device for selectively coupling to personal computer or solely to another add in device for proper functioning' [patent_app_type] => 1 [patent_app_number] => 8/643948 [patent_app_country] => US [patent_app_date] => 1996-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2815 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/890/05890016.pdf [firstpage_image] =>[orig_patent_app_number] => 643948 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/643948
Hybrid computer add in device for selectively coupling to personal computer or solely to another add in device for proper functioning May 6, 1996 Issued
Array ( [id] => 4100764 [patent_doc_number] => 06018778 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Disk array controller for reading/writing striped data using a single address counter for synchronously transferring data between data ports and buffer memory' [patent_app_type] => 1 [patent_app_number] => 8/642453 [patent_app_country] => US [patent_app_date] => 1996-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 11135 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018778.pdf [firstpage_image] =>[orig_patent_app_number] => 642453 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/642453
Disk array controller for reading/writing striped data using a single address counter for synchronously transferring data between data ports and buffer memory May 2, 1996 Issued
Array ( [id] => 3859386 [patent_doc_number] => 05745785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'System for alternatively transferring data from external memory to memory device and from memory device to internal memory depending upon processing unit\'s operational' [patent_app_type] => 1 [patent_app_number] => 8/643131 [patent_app_country] => US [patent_app_date] => 1996-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7130 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745785.pdf [firstpage_image] =>[orig_patent_app_number] => 643131 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/643131
System for alternatively transferring data from external memory to memory device and from memory device to internal memory depending upon processing unit's operational May 1, 1996 Issued
Array ( [id] => 3932581 [patent_doc_number] => 06003098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Graphic accelerator architecture using two graphics processing units for processing aspects of pre-rasterized graphics primitives and a control circuitry for relaying pass-through information' [patent_app_type] => 1 [patent_app_number] => 8/641448 [patent_app_country] => US [patent_app_date] => 1996-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9521 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/003/06003098.pdf [firstpage_image] =>[orig_patent_app_number] => 641448 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/641448
Graphic accelerator architecture using two graphics processing units for processing aspects of pre-rasterized graphics primitives and a control circuitry for relaying pass-through information Apr 29, 1996 Issued
Array ( [id] => 3850295 [patent_doc_number] => 05815735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Portable computer with removable display screen using removably mateable connectors to form the sole supporting interconnection between the computer base portion and display screen structure' [patent_app_type] => 1 [patent_app_number] => 8/639784 [patent_app_country] => US [patent_app_date] => 1996-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2545 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815735.pdf [firstpage_image] =>[orig_patent_app_number] => 639784 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/639784
Portable computer with removable display screen using removably mateable connectors to form the sole supporting interconnection between the computer base portion and display screen structure Apr 28, 1996 Issued
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