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David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20140978 [patent_doc_number] => 20250248022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => CAPACITOR AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 19/075173 [patent_app_country] => US [patent_app_date] => 2025-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19075173 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/075173
CAPACITOR AND MEMORY DEVICE Mar 9, 2025 Abandoned
Array ( [id] => 20011294 [patent_doc_number] => 20250149516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/780730 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/780730
SEMICONDUCTOR PACKAGE Jul 22, 2024 Pending
Array ( [id] => 20503564 [patent_doc_number] => 20260033029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => SURFACE PASSIVATION FOR DEEP TRENCH ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/780591 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780591 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/780591
SURFACE PASSIVATION FOR DEEP TRENCH ISOLATION STRUCTURE Jul 22, 2024 Pending
Array ( [id] => 19575605 [patent_doc_number] => 20240379897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => HIGH EFFICENT MICRO DEVICES [patent_app_type] => utility [patent_app_number] => 18/779475 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779475 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779475
HIGH EFFICENT MICRO DEVICES Jul 21, 2024 Pending
Array ( [id] => 19597107 [patent_doc_number] => 12154961 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-11-26 [patent_title] => Ohmic contacts for a high-electron-mobility transistor [patent_app_type] => utility [patent_app_number] => 18/742692 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742692 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742692
Ohmic contacts for a high-electron-mobility transistor Jun 12, 2024 Issued
Array ( [id] => 19486671 [patent_doc_number] => 20240334713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METHOD OF FORMING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/741794 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741794
Method of forming semiconductor device Jun 12, 2024 Issued
Array ( [id] => 20340253 [patent_doc_number] => 20250344373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => MEMORY DEVICE INCLUDING WORD LINE STRUCTURE HAVING LOWER AND UPPER GATE ELECTRODE LAYERS AND METHOD FOR PREPARING THE SAME [patent_app_type] => utility [patent_app_number] => 18/739609 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739609 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739609
MEMORY DEVICE INCLUDING WORD LINE STRUCTURE HAVING LOWER AND UPPER GATE ELECTRODE LAYERS AND METHOD FOR PREPARING THE SAME Jun 10, 2024 Pending
Array ( [id] => 19454873 [patent_doc_number] => 20240315003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => CAPACITOR AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/675175 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675175 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675175
Capacitor and memory device May 27, 2024 Issued
Array ( [id] => 19454917 [patent_doc_number] => 20240315047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => METHOD FOR MANUFACTURING A TWO-TERMINAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/671441 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671441 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671441
Method for manufacturing a two-terminal memory device May 21, 2024 Issued
Array ( [id] => 19454916 [patent_doc_number] => 20240315046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => TWO-TERMINAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/671431 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671431 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671431
Two-terminal memory device May 21, 2024 Issued
Array ( [id] => 19821196 [patent_doc_number] => 20250079403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/666556 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666556 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666556
SEMICONDUCTOR PACKAGE May 15, 2024 Pending
Array ( [id] => 19421127 [patent_doc_number] => 20240297251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/661694 [patent_app_country] => US [patent_app_date] => 2024-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18661694 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/661694
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE May 11, 2024 Pending
Array ( [id] => 19407161 [patent_doc_number] => 20240290672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE HAVING COMPOSITE DIELECTRIC FILM STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/656270 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656270 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656270
SEMICONDUCTOR MEMORY DEVICE HAVING COMPOSITE DIELECTRIC FILM STRUCTURE AND METHODS OF FORMING THE SAME May 5, 2024 Pending
Array ( [id] => 20340252 [patent_doc_number] => 20250344372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => MEMORY DEVICE INCLUDING WORD LINE STRUCTURE HAVING LOWER AND UPPER GATE ELECTRODE LAYERS AND METHOD FOR PREPARING THE SAME [patent_app_type] => utility [patent_app_number] => 18/655444 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655444
MEMORY DEVICE INCLUDING WORD LINE STRUCTURE HAVING LOWER AND UPPER GATE ELECTRODE LAYERS AND METHOD FOR PREPARING THE SAME May 5, 2024 Pending
Array ( [id] => 19407214 [patent_doc_number] => 20240290725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => PACKAGING STRUCTURE OF OPTICAL COMMUNICATION MODULE AND PRODUCTION METHOD [patent_app_type] => utility [patent_app_number] => 18/654143 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654143
PACKAGING STRUCTURE OF OPTICAL COMMUNICATION MODULE AND PRODUCTION METHOD May 2, 2024 Pending
Array ( [id] => 19392893 [patent_doc_number] => 20240282763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/650982 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650982 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/650982
SEMICONDUCTOR DEVICE Apr 29, 2024 Pending
Array ( [id] => 19546739 [patent_doc_number] => 20240363775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Photodetector with Improved Performance [patent_app_type] => utility [patent_app_number] => 18/646270 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646270 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/646270
Photodetector with Improved Performance Apr 24, 2024 Pending
Array ( [id] => 20925667 [patent_doc_number] => 12720754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/641654 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 4599 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641654
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Apr 21, 2024 Pending
Array ( [id] => 20072241 [patent_doc_number] => 20250210463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => SEMICONDUCTOR DIE WITH BURIED ELECTRICAL INTERCONNECTIONS [patent_app_type] => utility [patent_app_number] => 18/638429 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638429 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638429
SEMICONDUCTOR DIE WITH BURIED ELECTRICAL INTERCONNECTIONS Apr 16, 2024 Pending
Array ( [id] => 20299525 [patent_doc_number] => 20250324768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/634774 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18634774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/634774
SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF Apr 11, 2024 Pending
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