Search

David Vu

Examiner (ID: 216, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2019
Issued Applications
1695
Pending Applications
88
Abandoned Applications
267

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18184332 [patent_doc_number] => 20230045062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => NONVOLATILE MEMORY HAVING MULTIPLE NARROW TIPS AT FLOATING GATE [patent_app_type] => utility [patent_app_number] => 17/392269 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392269 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392269
Nonvolatile memory having multiple narrow tips at floating gate Aug 2, 2021 Issued
Array ( [id] => 19016420 [patent_doc_number] => 11923365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Integrated circuit devices including transistor stacks having different threshold voltages and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/387178 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8721 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387178
Integrated circuit devices including transistor stacks having different threshold voltages and methods of forming the same Jul 27, 2021 Issued
Array ( [id] => 20204116 [patent_doc_number] => 12406899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Semiconductor package system [patent_app_type] => utility [patent_app_number] => 17/384863 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384863
Semiconductor package system Jul 25, 2021 Issued
Array ( [id] => 17217846 [patent_doc_number] => 20210351184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 17/384347 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384347 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384347
Semiconductor device and manufacturing method of the same Jul 22, 2021 Issued
Array ( [id] => 18509079 [patent_doc_number] => 11706915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Programmable memory and forming method thereof [patent_app_type] => utility [patent_app_number] => 17/381219 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2994 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381219
Programmable memory and forming method thereof Jul 20, 2021 Issued
Array ( [id] => 19244626 [patent_doc_number] => 12015081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/377339 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 75 [patent_no_of_words] => 11707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377339 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377339
Semiconductor device and manufacturing method thereof Jul 14, 2021 Issued
Array ( [id] => 20191298 [patent_doc_number] => 12402439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Strain relaxation layer [patent_app_type] => utility [patent_app_number] => 18/009515 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5530 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18009515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/009515
Strain relaxation layer Jul 13, 2021 Issued
Array ( [id] => 18549814 [patent_doc_number] => 11723185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Capacitor structure, method for manufacturing same, and memory [patent_app_type] => utility [patent_app_number] => 17/369114 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369114 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369114
Capacitor structure, method for manufacturing same, and memory Jul 6, 2021 Issued
Array ( [id] => 17901144 [patent_doc_number] => 20220310806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/367869 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17367869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/367869
Semiconductor device and method of manufacturing thereof Jul 5, 2021 Issued
Array ( [id] => 18969388 [patent_doc_number] => 11903200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Semiconductor memory device and method for fabricating the semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/362624 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 13575 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362624 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362624
Semiconductor memory device and method for fabricating the semiconductor memory device Jun 28, 2021 Issued
Array ( [id] => 19200588 [patent_doc_number] => 11997852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/356173 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 9963 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356173
Semiconductor device and method of manufacturing semiconductor device Jun 22, 2021 Issued
Array ( [id] => 18481218 [patent_doc_number] => 11694973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Electromagnetic shielding metal-insulator-metal capacitor structure [patent_app_type] => utility [patent_app_number] => 17/356039 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356039
Electromagnetic shielding metal-insulator-metal capacitor structure Jun 22, 2021 Issued
Array ( [id] => 19108692 [patent_doc_number] => 11961806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/352503 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 56 [patent_no_of_words] => 12262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352503
Semiconductor device Jun 20, 2021 Issued
Array ( [id] => 17708954 [patent_doc_number] => 20220208962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/350051 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350051
Semiconductor device and manufacturing method thereof Jun 16, 2021 Issued
Array ( [id] => 18068359 [patent_doc_number] => 20220399447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => HIGH VOLTAGE FIELD EFFECT TRANSISTORS WITH SELF-ALIGNED SILICIDE CONTACTS AND METHODS FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/348305 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348305 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348305
High voltage field effect transistors with self-aligned silicide contacts and methods for making the same Jun 14, 2021 Issued
Array ( [id] => 18054209 [patent_doc_number] => 11527604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/342610 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342610
Semiconductor device Jun 8, 2021 Issued
Array ( [id] => 17115911 [patent_doc_number] => 20210296508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/340704 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340704
Method of manufacturing a semiconductor device and a semiconductor device Jun 6, 2021 Issued
Array ( [id] => 18048032 [patent_doc_number] => 11521990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/336620 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 5659 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336620 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336620
Display device Jun 1, 2021 Issued
Array ( [id] => 17115583 [patent_doc_number] => 20210296180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => FINFET TRANSISTOR HAVING A DOPED SUBFIN STRUCTURE TO REDUCE CHANNEL TO SUBSTRATE LEAKAGE [patent_app_type] => utility [patent_app_number] => 17/336565 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336565
FINFET transistor having a doped sub fin structure to reduce channel to substrate leakage Jun 1, 2021 Issued
Array ( [id] => 17855112 [patent_doc_number] => 20220285155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => IMPLANTATION MASK FORMATION [patent_app_type] => utility [patent_app_number] => 17/303522 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303522
Implantation mask formation May 31, 2021 Issued
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