Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18481218 [patent_doc_number] => 11694973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Electromagnetic shielding metal-insulator-metal capacitor structure [patent_app_type] => utility [patent_app_number] => 17/356039 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356039
Electromagnetic shielding metal-insulator-metal capacitor structure Jun 22, 2021 Issued
Array ( [id] => 19108692 [patent_doc_number] => 11961806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/352503 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 56 [patent_no_of_words] => 12262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352503
Semiconductor device Jun 20, 2021 Issued
Array ( [id] => 17708954 [patent_doc_number] => 20220208962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/350051 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350051
Semiconductor device and manufacturing method thereof Jun 16, 2021 Issued
Array ( [id] => 18068359 [patent_doc_number] => 20220399447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => HIGH VOLTAGE FIELD EFFECT TRANSISTORS WITH SELF-ALIGNED SILICIDE CONTACTS AND METHODS FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/348305 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348305 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348305
High voltage field effect transistors with self-aligned silicide contacts and methods for making the same Jun 14, 2021 Issued
Array ( [id] => 18054209 [patent_doc_number] => 11527604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/342610 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342610
Semiconductor device Jun 8, 2021 Issued
Array ( [id] => 17115911 [patent_doc_number] => 20210296508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/340704 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340704
Method of manufacturing a semiconductor device and a semiconductor device Jun 6, 2021 Issued
Array ( [id] => 18048032 [patent_doc_number] => 11521990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/336620 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 5659 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336620 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336620
Display device Jun 1, 2021 Issued
Array ( [id] => 17115583 [patent_doc_number] => 20210296180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => FINFET TRANSISTOR HAVING A DOPED SUBFIN STRUCTURE TO REDUCE CHANNEL TO SUBSTRATE LEAKAGE [patent_app_type] => utility [patent_app_number] => 17/336565 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336565
FINFET transistor having a doped sub fin structure to reduce channel to substrate leakage Jun 1, 2021 Issued
Array ( [id] => 17855112 [patent_doc_number] => 20220285155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => IMPLANTATION MASK FORMATION [patent_app_type] => utility [patent_app_number] => 17/303522 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303522
Implantation mask formation May 31, 2021 Issued
Array ( [id] => 17100260 [patent_doc_number] => 20210288051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/333540 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333540
Memory device comprising electrically floating body transistor May 27, 2021 Issued
Array ( [id] => 18156180 [patent_doc_number] => 11569171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Semiconductor memory device including wiring contact plugs [patent_app_type] => utility [patent_app_number] => 17/330795 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 101 [patent_no_of_words] => 15867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330795
Semiconductor memory device including wiring contact plugs May 25, 2021 Issued
Array ( [id] => 17583045 [patent_doc_number] => 20220139900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/329669 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329669
Semiconductor device May 24, 2021 Issued
Array ( [id] => 17085464 [patent_doc_number] => 20210280471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Strain Enhancement for FinFETs [patent_app_type] => utility [patent_app_number] => 17/328428 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328428 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328428
Strain enhancement for FinFETs May 23, 2021 Issued
Array ( [id] => 17878634 [patent_doc_number] => 11450658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor apparatus and manufacturing method [patent_app_type] => utility [patent_app_number] => 17/323346 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 8110 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323346
Semiconductor apparatus and manufacturing method May 17, 2021 Issued
Array ( [id] => 17477756 [patent_doc_number] => 20220085260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/322346 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322346
Display device May 16, 2021 Issued
Array ( [id] => 17536767 [patent_doc_number] => 20220115376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/320711 [patent_app_country] => US [patent_app_date] => 2021-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320711 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/320711
Semiconductor device and method of fabricating the same May 13, 2021 Issued
Array ( [id] => 18343448 [patent_doc_number] => 11640932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Packaged electronic device with film isolated power stack [patent_app_type] => utility [patent_app_number] => 17/318974 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 7100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318974 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318974
Packaged electronic device with film isolated power stack May 11, 2021 Issued
Array ( [id] => 18333108 [patent_doc_number] => 11638378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Method of fabricating semicondoctor device [patent_app_type] => utility [patent_app_number] => 17/317872 [patent_app_country] => US [patent_app_date] => 2021-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3434 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317872 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317872
Method of fabricating semicondoctor device May 10, 2021 Issued
Array ( [id] => 18032004 [patent_doc_number] => 11515202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => 3D IC method and device [patent_app_type] => utility [patent_app_number] => 17/315166 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 94 [patent_no_of_words] => 20146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315166
3D IC method and device May 6, 2021 Issued
Array ( [id] => 17040825 [patent_doc_number] => 20210257461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => METHOD FOR FORMING SUPER-JUNCTION CORNER AND TERMINATION STRUCTURE WITH GRADED SIDEWALLS [patent_app_type] => utility [patent_app_number] => 17/313998 [patent_app_country] => US [patent_app_date] => 2021-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17313998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/313998
Method for forming super-junction corner and termination structure with graded sidewalls May 5, 2021 Issued
Menu