
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13543191
[patent_doc_number] => 20180323142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => Structure Of Integrated Circuitry And A Method Of Forming A Conductive Via
[patent_app_type] => utility
[patent_app_number] => 15/926505
[patent_app_country] => US
[patent_app_date] => 2018-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4987
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15926505
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/926505 | Structure of integrated circuitry and a method of forming a conductive via | Mar 19, 2018 | Issued |
Array
(
[id] => 12896482
[patent_doc_number] => 20180190669
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-05
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/908921
[patent_app_country] => US
[patent_app_date] => 2018-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6021
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15908921
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/908921 | Semiconductor device and method for manufacturing the same | Feb 28, 2018 | Issued |
Array
(
[id] => 13819627
[patent_doc_number] => 10186588
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-22
[patent_title] => Semiconductor substrate and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/899808
[patent_app_country] => US
[patent_app_date] => 2018-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 5948
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899808
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899808 | Semiconductor substrate and semiconductor device | Feb 19, 2018 | Issued |
Array
(
[id] => 13755213
[patent_doc_number] => 10170561
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-01
[patent_title] => Diamond semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/899752
[patent_app_country] => US
[patent_app_date] => 2018-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 3852
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899752
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899752 | Diamond semiconductor device | Feb 19, 2018 | Issued |
Array
(
[id] => 13848195
[patent_doc_number] => 20190027582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-01-24
[patent_title] => INTEGRATED CIRCUIT DEVICES WITH BLOCKING LAYERS
[patent_app_type] => utility
[patent_app_number] => 15/899683
[patent_app_country] => US
[patent_app_date] => 2018-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12233
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899683
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899683 | Integrated circuit devices with blocking layers | Feb 19, 2018 | Issued |
Array
(
[id] => 14268121
[patent_doc_number] => 10283633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-07
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/899925
[patent_app_country] => US
[patent_app_date] => 2018-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 40
[patent_no_of_words] => 14987
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 331
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899925
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/899925 | Semiconductor device and method for manufacturing the same | Feb 19, 2018 | Issued |
Array
(
[id] => 14707213
[patent_doc_number] => 10381366
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-13
[patent_title] => Air gap three-dimensional cross rail memory device and method of making thereof
[patent_app_type] => utility
[patent_app_number] => 15/898571
[patent_app_country] => US
[patent_app_date] => 2018-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 70
[patent_no_of_words] => 17621
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898571
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/898571 | Air gap three-dimensional cross rail memory device and method of making thereof | Feb 16, 2018 | Issued |
Array
(
[id] => 13976789
[patent_doc_number] => 10217762
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Doping channels of edge cells to provide uniform programming speed and reduce read disturb
[patent_app_type] => utility
[patent_app_number] => 15/889519
[patent_app_country] => US
[patent_app_date] => 2018-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 39
[patent_no_of_words] => 15572
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889519
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/889519 | Doping channels of edge cells to provide uniform programming speed and reduce read disturb | Feb 5, 2018 | Issued |
Array
(
[id] => 16286142
[patent_doc_number] => 20200279744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/766003
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766003
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/766003 | Method of manufacturing semiconductor device | Feb 1, 2018 | Issued |
Array
(
[id] => 16286142
[patent_doc_number] => 20200279744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/766003
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766003
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/766003 | Method of manufacturing semiconductor device | Feb 1, 2018 | Issued |
Array
(
[id] => 16286142
[patent_doc_number] => 20200279744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/766003
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766003
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/766003 | Method of manufacturing semiconductor device | Feb 1, 2018 | Issued |
Array
(
[id] => 16286142
[patent_doc_number] => 20200279744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-03
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/766003
[patent_app_country] => US
[patent_app_date] => 2018-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16766003
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/766003 | Method of manufacturing semiconductor device | Feb 1, 2018 | Issued |
Array
(
[id] => 14011621
[patent_doc_number] => 10224286
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-03-05
[patent_title] => Interconnect structure with adhesive dielectric layer and methods of forming same
[patent_app_type] => utility
[patent_app_number] => 15/883693
[patent_app_country] => US
[patent_app_date] => 2018-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6489
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15883693
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/883693 | Interconnect structure with adhesive dielectric layer and methods of forming same | Jan 29, 2018 | Issued |
Array
(
[id] => 13666955
[patent_doc_number] => 10163651
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-12-25
[patent_title] => Structure and method to expose memory cells with different sizes
[patent_app_type] => utility
[patent_app_number] => 15/883748
[patent_app_country] => US
[patent_app_date] => 2018-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 7591
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15883748
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/883748 | Structure and method to expose memory cells with different sizes | Jan 29, 2018 | Issued |
Array
(
[id] => 15061349
[patent_doc_number] => 10460986
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-29
[patent_title] => Cap structure
[patent_app_type] => utility
[patent_app_number] => 15/882291
[patent_app_country] => US
[patent_app_date] => 2018-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2904
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882291
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/882291 | Cap structure | Jan 28, 2018 | Issued |
Array
(
[id] => 13349641
[patent_doc_number] => 20180226360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-09
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 15/882242
[patent_app_country] => US
[patent_app_date] => 2018-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5053
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882242
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/882242 | Semiconductor device and method of manufacturing same | Jan 28, 2018 | Issued |
Array
(
[id] => 14492325
[patent_doc_number] => 10332963
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-06-25
[patent_title] => Uniformity tuning of variable-height features formed in trenches
[patent_app_type] => utility
[patent_app_number] => 15/882031
[patent_app_country] => US
[patent_app_date] => 2018-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 4332
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882031
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/882031 | Uniformity tuning of variable-height features formed in trenches | Jan 28, 2018 | Issued |
Array
(
[id] => 14676631
[patent_doc_number] => 20190237430
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => 3D IC PACKAGE WITH RDL INTERPOSER AND RELATED METHOD
[patent_app_type] => utility
[patent_app_number] => 15/882036
[patent_app_country] => US
[patent_app_date] => 2018-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5946
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882036
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/882036 | 3D IC package with RDL interposer and related method | Jan 28, 2018 | Issued |
Array
(
[id] => 12779833
[patent_doc_number] => 20180151779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => Light Emitting Diode and Fabrication Method Thereof
[patent_app_type] => utility
[patent_app_number] => 15/871289
[patent_app_country] => US
[patent_app_date] => 2018-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3365
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871289
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/871289 | Light emitting diode and fabrication method thereof | Jan 14, 2018 | Issued |
Array
(
[id] => 14767381
[patent_doc_number] => 10395087
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Biometric sensing chip and electronic device using same
[patent_app_type] => utility
[patent_app_number] => 15/871193
[patent_app_country] => US
[patent_app_date] => 2018-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 6477
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871193
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/871193 | Biometric sensing chip and electronic device using same | Jan 14, 2018 | Issued |