Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11732980 [patent_doc_number] => 20170194424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'Seamless Gap Fill' [patent_app_type] => utility [patent_app_number] => 15/290772 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290772 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290772
Seamless gap fill Oct 10, 2016 Issued
Array ( [id] => 13214711 [patent_doc_number] => 10121731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/290899 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 5801 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290899 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290899
Semiconductor device Oct 10, 2016 Issued
Array ( [id] => 11922512 [patent_doc_number] => 09790082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'CMOS and pressure sensor integrated on a chip and fabrication method' [patent_app_type] => utility [patent_app_number] => 15/271627 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 5378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271627
CMOS and pressure sensor integrated on a chip and fabrication method Sep 20, 2016 Issued
Array ( [id] => 12936217 [patent_doc_number] => 09831304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-28 [patent_title] => Integrated circuits with deep trench isolations and methods for producing the same [patent_app_type] => utility [patent_app_number] => 15/271599 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4937 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271599
Integrated circuits with deep trench isolations and methods for producing the same Sep 20, 2016 Issued
Array ( [id] => 11918591 [patent_doc_number] => 09786784 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-10 [patent_title] => 'Vertical field effect transistor and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 15/271660 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5973 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271660 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271660
Vertical field effect transistor and method of fabricating the same Sep 20, 2016 Issued
Array ( [id] => 12263893 [patent_doc_number] => 20180083089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE RESISTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/271730 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15271730 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/271730
Semiconductor device resistor structure Sep 20, 2016 Issued
Array ( [id] => 12047612 [patent_doc_number] => 09825224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'RRAM device' [patent_app_type] => utility [patent_app_number] => 15/233028 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233028 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233028
RRAM device Aug 9, 2016 Issued
Array ( [id] => 12047562 [patent_doc_number] => 09825171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/232343 [patent_app_country] => US [patent_app_date] => 2016-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 51 [patent_no_of_words] => 15647 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232343 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/232343
Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device Aug 8, 2016 Issued
Array ( [id] => 11544827 [patent_doc_number] => 20170098652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-06 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING CAPACITOR AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/229424 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 9593 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229424 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229424
Semiconductor device having capacitor and method of fabricating the semiconductor device Aug 4, 2016 Issued
Array ( [id] => 12396177 [patent_doc_number] => 09966313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => FinFET device and method of manufacturing [patent_app_type] => utility [patent_app_number] => 15/229431 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2293 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229431 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229431
FinFET device and method of manufacturing Aug 4, 2016 Issued
Array ( [id] => 11753519 [patent_doc_number] => 09711538 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Display device' [patent_app_type] => utility [patent_app_number] => 15/229450 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7947 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229450
Display device Aug 4, 2016 Issued
Array ( [id] => 11932752 [patent_doc_number] => 09799756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-24 [patent_title] => 'Germanium lateral bipolar transistor with silicon passivation' [patent_app_type] => utility [patent_app_number] => 15/229378 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6412 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229378 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229378
Germanium lateral bipolar transistor with silicon passivation Aug 4, 2016 Issued
Array ( [id] => 14300839 [patent_doc_number] => 10290550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Strain enhancement for FinFETs [patent_app_type] => utility [patent_app_number] => 15/220989 [patent_app_country] => US [patent_app_date] => 2016-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 36 [patent_no_of_words] => 5332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220989 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/220989
Strain enhancement for FinFETs Jul 26, 2016 Issued
Array ( [id] => 12040463 [patent_doc_number] => 09818697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Semiconductor package manufacturing method' [patent_app_type] => utility [patent_app_number] => 15/202054 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 8210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202054 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/202054
Semiconductor package manufacturing method Jul 4, 2016 Issued
Array ( [id] => 17063277 [patent_doc_number] => 11107890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => FINFET transistor having a doped subfin structure to reduce channel to substrate leakage [patent_app_type] => utility [patent_app_number] => 16/095287 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3818 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16095287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/095287
FINFET transistor having a doped subfin structure to reduce channel to substrate leakage Jun 29, 2016 Issued
Array ( [id] => 11103976 [patent_doc_number] => 20160300945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'Semiconductor Device with Cell Trench Structures and a Contact Structure' [patent_app_type] => utility [patent_app_number] => 15/188217 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12092 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188217 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188217
Semiconductor device with cell trench structures and a contact structure Jun 20, 2016 Issued
Array ( [id] => 13879197 [patent_doc_number] => 20190035939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => METAL OXIDE FILM, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/072019 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 61010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16072019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/072019
Metal oxide film, semiconductor device, and manufacturing method of semiconductor device May 18, 2016 Issued
Array ( [id] => 11353733 [patent_doc_number] => 20160372473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'METHOD TO FORM DUAL CHANNEL SEMICONDUCTOR MATERIAL FINS' [patent_app_type] => utility [patent_app_number] => 15/158073 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7957 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/158073
Method to form dual channel semiconductor material fins May 17, 2016 Issued
Array ( [id] => 11510320 [patent_doc_number] => 09601486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'ESD snapback based clamp for finFET' [patent_app_type] => utility [patent_app_number] => 15/156750 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156750 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156750
ESD snapback based clamp for finFET May 16, 2016 Issued
Array ( [id] => 11660049 [patent_doc_number] => 09673060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'System and method for integrated circuits with cylindrical gate structures' [patent_app_type] => utility [patent_app_number] => 15/157366 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 57 [patent_no_of_words] => 17209 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157366 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157366
System and method for integrated circuits with cylindrical gate structures May 16, 2016 Issued
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