Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8560119 [patent_doc_number] => 08334182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Method for manufacturing non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/117443 [patent_app_country] => US [patent_app_date] => 2011-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3464 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13117443 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/117443
Method for manufacturing non-volatile memory May 26, 2011 Issued
Array ( [id] => 7511006 [patent_doc_number] => 20110256716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features' [patent_app_type] => utility [patent_app_number] => 13/068821 [patent_app_country] => US [patent_app_date] => 2011-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8032 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256716.pdf [firstpage_image] =>[orig_patent_app_number] => 13068821 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/068821
Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features May 19, 2011 Issued
Array ( [id] => 6089494 [patent_doc_number] => 20110217835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH SIDEWALL CONDUCTIVE PATTERNS' [patent_app_type] => utility [patent_app_number] => 13/110113 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6523 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20110217835.pdf [firstpage_image] =>[orig_patent_app_number] => 13110113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110113
Methods of fabricating semiconductor devices with sidewall conductive patterns May 17, 2011 Issued
Array ( [id] => 6063355 [patent_doc_number] => 20110201142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'Method of Manufacturing a Light-Emitting Device' [patent_app_type] => utility [patent_app_number] => 13/093246 [patent_app_country] => US [patent_app_date] => 2011-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4456 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20110201142.pdf [firstpage_image] =>[orig_patent_app_number] => 13093246 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/093246
Method of manufacturing a light-emitting device Apr 24, 2011 Issued
Array ( [id] => 6165959 [patent_doc_number] => 20110195558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/088030 [patent_app_country] => US [patent_app_date] => 2011-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4802 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20110195558.pdf [firstpage_image] =>[orig_patent_app_number] => 13088030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/088030
Non-volatile semiconductor memory device and method of manufacturing the same Apr 14, 2011 Issued
Array ( [id] => 6111769 [patent_doc_number] => 20110189850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/084623 [patent_app_country] => US [patent_app_date] => 2011-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4532 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20110189850.pdf [firstpage_image] =>[orig_patent_app_number] => 13084623 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/084623
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Apr 11, 2011 Abandoned
Array ( [id] => 8414212 [patent_doc_number] => 20120241712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'Resistive-Switching Memory and Fabrication Method Thereof' [patent_app_type] => utility [patent_app_number] => 13/254570 [patent_app_country] => US [patent_app_date] => 2011-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2753 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13254570 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/254570
Resistive-switching memory and fabrication method thereof Apr 11, 2011 Issued
Array ( [id] => 6099057 [patent_doc_number] => 20110163459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/051179 [patent_app_country] => US [patent_app_date] => 2011-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4067 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20110163459.pdf [firstpage_image] =>[orig_patent_app_number] => 13051179 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/051179
METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE Mar 17, 2011 Abandoned
Array ( [id] => 8797538 [patent_doc_number] => 08436410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Semiconductor devices comprising a plurality of gate structures' [patent_app_type] => utility [patent_app_number] => 13/050335 [patent_app_country] => US [patent_app_date] => 2011-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 9116 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13050335 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/050335
Semiconductor devices comprising a plurality of gate structures Mar 16, 2011 Issued
Array ( [id] => 8592392 [patent_doc_number] => 08350268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Thin film transistor substrate' [patent_app_type] => utility [patent_app_number] => 13/043267 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5332 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13043267 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043267
Thin film transistor substrate Mar 7, 2011 Issued
Array ( [id] => 8368242 [patent_doc_number] => 20120217629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump' [patent_app_type] => utility [patent_app_number] => 13/035617 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9094 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13035617 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/035617
Semiconductor device and method of forming a wafer level package structure using conductive via and exposed bump Feb 24, 2011 Issued
Array ( [id] => 8071851 [patent_doc_number] => 20110241097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/929938 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2872 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241097.pdf [firstpage_image] =>[orig_patent_app_number] => 12929938 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929938
Semiconductor device and manufacturing method thereof Feb 24, 2011 Issued
Array ( [id] => 6208370 [patent_doc_number] => 20110133293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 13/025858 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7706 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133293.pdf [firstpage_image] =>[orig_patent_app_number] => 13025858 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025858
Semiconductor device and semiconductor device manufacturing method Feb 10, 2011 Issued
Array ( [id] => 8502571 [patent_doc_number] => 20120301978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'METHOD FOR PRODUCING PHOTOELECTRIC CONVERSION DEVICE AND LIGHT BEAM IRRADIATION PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/576765 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10269 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13576765 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/576765
METHOD FOR PRODUCING PHOTOELECTRIC CONVERSION DEVICE AND LIGHT BEAM IRRADIATION PROCESSING APPARATUS Feb 1, 2011 Abandoned
Array ( [id] => 9312351 [patent_doc_number] => 08653573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Dielectric layers and memory cells including metal-doped alumina' [patent_app_type] => utility [patent_app_number] => 13/017186 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13017186 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017186
Dielectric layers and memory cells including metal-doped alumina Jan 30, 2011 Issued
Array ( [id] => 10876123 [patent_doc_number] => 08900908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Method for local high-doping and contacting of a semiconductor structure which comprises a solar cell or a precursor of a solar cell' [patent_app_type] => utility [patent_app_number] => 13/575446 [patent_app_country] => US [patent_app_date] => 2011-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6468 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13575446 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/575446
Method for local high-doping and contacting of a semiconductor structure which comprises a solar cell or a precursor of a solar cell Jan 17, 2011 Issued
Array ( [id] => 7800976 [patent_doc_number] => 08129246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Advanced CMOS using super steep retrograde wells' [patent_app_type] => utility [patent_app_number] => 13/006224 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3576 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/129/08129246.pdf [firstpage_image] =>[orig_patent_app_number] => 13006224 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/006224
Advanced CMOS using super steep retrograde wells Jan 12, 2011 Issued
Array ( [id] => 8955787 [patent_doc_number] => 08501558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 13/004317 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 39 [patent_no_of_words] => 33239 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13004317 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/004317
Semiconductor device and manufacturing method of the same Jan 10, 2011 Issued
Array ( [id] => 8287401 [patent_doc_number] => 20120175727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/986225 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3939 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12986225 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986225
Semiconductor device and fabrication method thereof Jan 6, 2011 Issued
Array ( [id] => 5940847 [patent_doc_number] => 20110101467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/986739 [patent_app_country] => US [patent_app_date] => 2011-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20110101467.pdf [firstpage_image] =>[orig_patent_app_number] => 12986739 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/986739
STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Jan 6, 2011 Abandoned
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