
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8560119
[patent_doc_number] => 08334182
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-12-18
[patent_title] => 'Method for manufacturing non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 13/117443
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13117443
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/117443 | Method for manufacturing non-volatile memory | May 26, 2011 | Issued |
Array
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[patent_doc_number] => 20110256716
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[patent_issue_date] => 2011-10-20
[patent_title] => 'Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/068821 | Method of depositing a uniform barrier layer and metal seed layer with reduced overhang over a plurality of recessed semiconductor features | May 19, 2011 | Issued |
Array
(
[id] => 6089494
[patent_doc_number] => 20110217835
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[patent_kind] => A1
[patent_issue_date] => 2011-09-08
[patent_title] => 'METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH SIDEWALL CONDUCTIVE PATTERNS'
[patent_app_type] => utility
[patent_app_number] => 13/110113
[patent_app_country] => US
[patent_app_date] => 2011-05-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/110113 | Methods of fabricating semiconductor devices with sidewall conductive patterns | May 17, 2011 | Issued |
Array
(
[id] => 6063355
[patent_doc_number] => 20110201142
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[patent_kind] => A1
[patent_issue_date] => 2011-08-18
[patent_title] => 'Method of Manufacturing a Light-Emitting Device'
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[patent_app_number] => 13/093246
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[patent_app_date] => 2011-04-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/093246 | Method of manufacturing a light-emitting device | Apr 24, 2011 | Issued |
Array
(
[id] => 6165959
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[patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME'
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[patent_app_number] => 13/088030
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Array
(
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
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Array
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[patent_title] => 'Resistive-Switching Memory and Fabrication Method Thereof'
[patent_app_type] => utility
[patent_app_number] => 13/254570
[patent_app_country] => US
[patent_app_date] => 2011-04-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/254570 | Resistive-switching memory and fabrication method thereof | Apr 11, 2011 | Issued |
Array
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[patent_title] => 'METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/051179
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/051179 | METHOD FOR MANUFACTURING A STACKED SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE | Mar 17, 2011 | Abandoned |
Array
(
[id] => 8797538
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[patent_title] => 'Semiconductor devices comprising a plurality of gate structures'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/050335 | Semiconductor devices comprising a plurality of gate structures | Mar 16, 2011 | Issued |
Array
(
[id] => 8592392
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[patent_issue_date] => 2013-01-08
[patent_title] => 'Thin film transistor substrate'
[patent_app_type] => utility
[patent_app_number] => 13/043267
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Array
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[patent_title] => 'Semiconductor Device and Method of Forming a Wafer Level Package Structure Using Conductive Via and Exposed Bump'
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Array
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Array
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Array
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Array
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Array
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Array
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