
David Vu
Examiner (ID: 16348)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 1996 |
| Issued Applications | 1682 |
| Pending Applications | 76 |
| Abandoned Applications | 267 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8317418
[patent_doc_number] => 08232195
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-31
[patent_title] => 'Method for fabricating back end of the line structures with liner and seed materials'
[patent_app_type] => utility
[patent_app_number] => 12/137875
[patent_app_country] => US
[patent_app_date] => 2008-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2697
[patent_no_of_claims] => 12
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[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12137875
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/137875 | Method for fabricating back end of the line structures with liner and seed materials | Jun 11, 2008 | Issued |
Array
(
[id] => 4660913
[patent_doc_number] => 20080251820
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'CMOS image sensor and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/157546
[patent_app_country] => US
[patent_app_date] => 2008-06-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0251/20080251820.pdf
[firstpage_image] =>[orig_patent_app_number] => 12157546
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/157546 | CMOS image sensor and fabricating method thereof | Jun 10, 2008 | Issued |
Array
(
[id] => 4715344
[patent_doc_number] => 20080237866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'SEMICONDUCTOR DEVICE WITH STRENGTHENED PADS'
[patent_app_type] => utility
[patent_app_number] => 12/134625
[patent_app_country] => US
[patent_app_date] => 2008-06-06
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[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0237/20080237866.pdf
[firstpage_image] =>[orig_patent_app_number] => 12134625
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/134625 | SEMICONDUCTOR DEVICE WITH STRENGTHENED PADS | Jun 5, 2008 | Abandoned |
Array
(
[id] => 4715157
[patent_doc_number] => 20080237679
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'SEMICONDUCTOR DEVICES WITH SIDEWALL CONDUCTIVE PATTERNS AND METHODS OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/133146
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6503
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20080237679.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133146
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133146 | Semiconductor devices with sidewall conductive patterns and methods of fabricating the same | Jun 3, 2008 | Issued |
Array
(
[id] => 75202
[patent_doc_number] => 07750395
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-06
[patent_title] => 'Scalable Flash/NV structures and devices with extended endurance'
[patent_app_type] => utility
[patent_app_number] => 12/133110
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[patent_no_of_words] => 8686
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/750/07750395.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133110
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133110 | Scalable Flash/NV structures and devices with extended endurance | Jun 3, 2008 | Issued |
Array
(
[id] => 4737273
[patent_doc_number] => 20080230925
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'SOLDER-BUMPING STRUCTURES PRODUCED BY A SOLDER BUMPING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/133026
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4450
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[pdf_file] => publications/A1/0230/20080230925.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133026
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133026 | SOLDER-BUMPING STRUCTURES PRODUCED BY A SOLDER BUMPING METHOD | Jun 3, 2008 | Abandoned |
Array
(
[id] => 4715230
[patent_doc_number] => 20080237752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/128796
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6613
[patent_no_of_claims] => 15
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[pdf_file] => publications/A1/0237/20080237752.pdf
[firstpage_image] =>[orig_patent_app_number] => 12128796
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/128796 | Method for manufacturing semiconductor integrated circuit device | May 28, 2008 | Issued |
Array
(
[id] => 5361128
[patent_doc_number] => 20090035922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-05
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/124385
[patent_app_country] => US
[patent_app_date] => 2008-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 15585
[patent_no_of_claims] => 37
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[pdf_file] => publications/A1/0035/20090035922.pdf
[firstpage_image] =>[orig_patent_app_number] => 12124385
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/124385 | Semiconductor device and manufacturing method thereof | May 20, 2008 | Issued |
Array
(
[id] => 6383463
[patent_doc_number] => 20100176463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-15
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/663737
[patent_app_country] => US
[patent_app_date] => 2008-05-20
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[patent_drawing_sheets_cnt] => 22
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[firstpage_image] =>[orig_patent_app_number] => 12663737
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/663737 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | May 19, 2008 | Abandoned |
Array
(
[id] => 4660951
[patent_doc_number] => 20080251858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-16
[patent_title] => 'FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/122805
[patent_app_country] => US
[patent_app_date] => 2008-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3207
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[pdf_file] => publications/A1/0251/20080251858.pdf
[firstpage_image] =>[orig_patent_app_number] => 12122805
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/122805 | Field effect transistor and method for manufacturing the same | May 18, 2008 | Issued |
Array
(
[id] => 4538414
[patent_doc_number] => 07888804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Method for forming self-aligned contacts and local interconnects simultaneously'
[patent_app_type] => utility
[patent_app_number] => 12/113855
[patent_app_country] => US
[patent_app_date] => 2008-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/07/888/07888804.pdf
[firstpage_image] =>[orig_patent_app_number] => 12113855
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/113855 | Method for forming self-aligned contacts and local interconnects simultaneously | Apr 30, 2008 | Issued |
Array
(
[id] => 8375232
[patent_doc_number] => 08258023
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-09-04
[patent_title] => 'Thin film transistor and method for preparing the same'
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[patent_app_number] => 12/451051
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/451051 | Thin film transistor and method for preparing the same | Apr 24, 2008 | Issued |
Array
(
[id] => 4946961
[patent_doc_number] => 20080303087
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[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'Semiconductor device with integrated trench lateral power MOSFETs and planar devices'
[patent_app_type] => utility
[patent_app_number] => 12/149016
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[firstpage_image] =>[orig_patent_app_number] => 12149016
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/149016 | Semiconductor device with integrated trench lateral power MOSFETs and planar devices | Apr 23, 2008 | Abandoned |
Array
(
[id] => 6271688
[patent_doc_number] => 20100117072
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[patent_issue_date] => 2010-05-13
[patent_title] => 'LIGHT EMITTING APPARATUS AND METHOD OF MANUFACTURING THE SAME'
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[patent_app_number] => 12/596998
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Array
(
[id] => 6382822
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[patent_issue_date] => 2010-07-15
[patent_title] => 'VARIABLE RESISTANCE ELEMENT AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/602933 | VARIABLE RESISTANCE ELEMENT AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME | Apr 15, 2008 | Abandoned |
Array
(
[id] => 4810581
[patent_doc_number] => 20080191212
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-14
[patent_title] => 'Thin film transistor array panel and manufacturing methd thereof'
[patent_app_type] => utility
[patent_app_number] => 12/082495
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[pdf_file] => publications/A1/0191/20080191212.pdf
[firstpage_image] =>[orig_patent_app_number] => 12082495
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/082495 | Thin film transistor array panel and manufacturing method thereof | Apr 10, 2008 | Issued |
Array
(
[id] => 4660281
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[patent_issue_date] => 2008-10-16
[patent_title] => 'METHOD FOR MANUFACTURING DEVICE'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/060873 | Pixel structure, display panel, eletro-optical apparatus, and method thererof | Apr 1, 2008 | Issued |
Array
(
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[patent_title] => 'Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/060615 | Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same | Mar 31, 2008 | Issued |
Array
(
[id] => 4469353
[patent_doc_number] => 07943454
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[patent_title] => 'Method for dual stress liner'
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[pdf_file] => patents/07/943/07943454.pdf
[firstpage_image] =>[orig_patent_app_number] => 12080016
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/080016 | Method for dual stress liner | Mar 30, 2008 | Issued |