
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6383463
[patent_doc_number] => 20100176463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-15
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/663737
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[pdf_file] => publications/A1/0176/20100176463.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/663737 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME | May 19, 2008 | Abandoned |
Array
(
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[patent_doc_number] => 20080251858
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[patent_issue_date] => 2008-10-16
[patent_title] => 'FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/122805 | Field effect transistor and method for manufacturing the same | May 18, 2008 | Issued |
Array
(
[id] => 4538414
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[patent_issue_date] => 2011-02-15
[patent_title] => 'Method for forming self-aligned contacts and local interconnects simultaneously'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/113855 | Method for forming self-aligned contacts and local interconnects simultaneously | Apr 30, 2008 | Issued |
Array
(
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[patent_issue_date] => 2012-09-04
[patent_title] => 'Thin film transistor and method for preparing the same'
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Array
(
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[patent_title] => 'Semiconductor device with integrated trench lateral power MOSFETs and planar devices'
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Array
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Array
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[patent_title] => 'VARIABLE RESISTANCE ELEMENT AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/602933
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/602933 | VARIABLE RESISTANCE ELEMENT AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME | Apr 15, 2008 | Abandoned |
Array
(
[id] => 4810581
[patent_doc_number] => 20080191212
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[patent_issue_date] => 2008-08-14
[patent_title] => 'Thin film transistor array panel and manufacturing methd thereof'
[patent_app_type] => utility
[patent_app_number] => 12/082495
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/082495 | Thin film transistor array panel and manufacturing method thereof | Apr 10, 2008 | Issued |
Array
(
[id] => 4660281
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[patent_title] => 'METHOD FOR MANUFACTURING DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/061867 | Method for manufacturing device | Apr 2, 2008 | Issued |
Array
(
[id] => 5543179
[patent_doc_number] => 20090153056
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[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'PIXEL STRUCTURE, DISPLAY PANEL, ELETRO-OPTICAL APPARATUS, AND METHOD THEREROF'
[patent_app_type] => utility
[patent_app_number] => 12/060873
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/060873 | Pixel structure, display panel, eletro-optical apparatus, and method thererof | Apr 1, 2008 | Issued |
Array
(
[id] => 4542828
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[patent_title] => 'Selective links in silicon hetero-junction bipolar transistors using carbon doping and method of forming same'
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[patent_app_number] => 12/060615
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Array
(
[id] => 4469353
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Array
(
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Array
(
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Array
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Array
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Array
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Array
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