David Vu

Array ( [id] => 4743369 [patent_doc_number] => 20080087970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'Wet chemical treatment to form a thin oxide for high k gate dielectrics' [patent_app_type] => utility [patent_app_number] => 11/977591 [patent_app_country] => US [patent_app_date] => 2007-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3457 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20080087970.pdf [firstpage_image] =>[orig_patent_app_number] => 11977591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 260333 [patent_doc_number] => 07573060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Optical semiconductor device having active layer of p-type quantum dot structure and its manufacture method' [patent_app_type] => utility [patent_app_number] => 11/976120 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6867 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573060.pdf [firstpage_image] =>[orig_patent_app_number] => 11976120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5268519 [patent_doc_number] => 20090072294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Method of manufacturing a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/974636 [patent_app_country] => US [patent_app_date] => 2007-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8698 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072294.pdf [firstpage_image] =>[orig_patent_app_number] => 11974636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5439351 [patent_doc_number] => 20090090990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'FORMATION OF NITROGEN CONTAINING DIELECTRIC LAYERS HAVING AN IMPROVED NITROGEN DISTRIBUTION' [patent_app_type] => utility [patent_app_number] => 11/856310 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20090090990.pdf [firstpage_image] =>[orig_patent_app_number] => 11856310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4892016 [patent_doc_number] => 20080101113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'Memory device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/906680 [patent_app_country] => US [patent_app_date] => 2007-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 22814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20080101113.pdf [firstpage_image] =>[orig_patent_app_number] => 11906680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 141697 [patent_doc_number] => 07687352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Trench MOSFET and method of manufacture utilizing four masks' [patent_app_type] => utility [patent_app_number] => 11/866350 [patent_app_country] => US [patent_app_date] => 2007-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 3691 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687352.pdf [firstpage_image] =>[orig_patent_app_number] => 11866350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4941679 [patent_doc_number] => 20080079002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-03 [patent_title] => 'DISPLAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/864165 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5542 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20080079002.pdf [firstpage_image] =>[orig_patent_app_number] => 11864165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 103059 [patent_doc_number] => 07728371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'SOI CMOS compatible multiplanar capacitor' [patent_app_type] => utility [patent_app_number] => 11/857770 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6453 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728371.pdf [firstpage_image] =>[orig_patent_app_number] => 11857770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8909360 [patent_doc_number] => 08481423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Methods to mitigate plasma damage in organosilicate dielectrics' [patent_app_type] => utility [patent_app_number] => 11/857760 [patent_app_country] => US [patent_app_date] => 2007-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 12294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11857760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9389198 [patent_doc_number] => 08685796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Electronic device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/856730 [patent_app_country] => US [patent_app_date] => 2007-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 6659 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11856730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4719550 [patent_doc_number] => 20080242073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHOD FOR FABRICATING A NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/856690 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4010 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242073.pdf [firstpage_image] =>[orig_patent_app_number] => 11856690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4859744 [patent_doc_number] => 20080268594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'METHOD OF FABRICATING A FLASH MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/856700 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3101 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20080268594.pdf [firstpage_image] =>[orig_patent_app_number] => 11856700 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5268580 [patent_doc_number] => 20090072355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'DUAL SHALLOW TRENCH ISOLATION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/856260 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20090072355.pdf [firstpage_image] =>[orig_patent_app_number] => 11856260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4879815 [patent_doc_number] => 20080153198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Method for Fabricating CMOS Image Sensor' [patent_app_type] => utility [patent_app_number] => 11/854860 [patent_app_country] => US [patent_app_date] => 2007-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1739 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153198.pdf [firstpage_image] =>[orig_patent_app_number] => 11854860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8920899 [patent_doc_number] => 08486832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/898140 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2899 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11898140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5197928 [patent_doc_number] => 20070297246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'NON-VOLATILE ELECTRICALLY ALTERABLE SEMICONDUCTOR MEMORY WITH CONTROL AND FLOATING GATES AND SIDE-WALL COUPLING' [patent_app_type] => utility [patent_app_number] => 11/851913 [patent_app_country] => US [patent_app_date] => 2007-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5627 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0297/20070297246.pdf [firstpage_image] =>[orig_patent_app_number] => 11851913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6130469 [patent_doc_number] => 20110006319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'GALLIUM NITRIDE LIGHT-EMITTING DEVICE WITH ULTRA-HIGH REVERSE BREAKDOWN VOLTAGE' [patent_app_type] => utility [patent_app_number] => 12/159850 [patent_app_country] => US [patent_app_date] => 2007-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2630 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006319.pdf [firstpage_image] =>[orig_patent_app_number] => 12159850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 190854 [patent_doc_number] => 07642165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Semiconductor device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/892940 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 82 [patent_no_of_words] => 14206 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642165.pdf [firstpage_image] =>[orig_patent_app_number] => 11892940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4576124 [patent_doc_number] => 07829878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Semiconductor device and manufacture method thereof' [patent_app_type] => utility [patent_app_number] => 11/845120 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5199 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/829/07829878.pdf [firstpage_image] =>[orig_patent_app_number] => 11845120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5230902 [patent_doc_number] => 20070293010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'BURIED BIASING WELLS IN FETs (Field Effect Transistors)' [patent_app_type] => utility [patent_app_number] => 11/845244 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3056 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20070293010.pdf [firstpage_image] =>[orig_patent_app_number] => 11845244 [rel_patent_id] =>[rel_patent_doc_number] =>)