Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5898235 [patent_doc_number] => 20060043468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Stepped gate configuration for non-volatile memory' [patent_app_type] => utility [patent_app_number] => 11/257843 [patent_app_country] => US [patent_app_date] => 2005-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3629 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20060043468.pdf [firstpage_image] =>[orig_patent_app_number] => 11257843 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/257843
Stepped gate configuration for non-volatile memory Oct 24, 2005 Abandoned
Array ( [id] => 5807872 [patent_doc_number] => 20060094227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Method of forming a contact in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/257980 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20060094227.pdf [firstpage_image] =>[orig_patent_app_number] => 11257980 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/257980
Method of forming a contact in a semiconductor device Oct 23, 2005 Issued
Array ( [id] => 5040741 [patent_doc_number] => 20070093023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Non-volatile memory and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/258490 [patent_app_country] => US [patent_app_date] => 2005-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20070093023.pdf [firstpage_image] =>[orig_patent_app_number] => 11258490 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/258490
Trench type non-volatile memory having three storage locations in one memory cell Oct 23, 2005 Issued
Array ( [id] => 5980198 [patent_doc_number] => 20110095381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Gate structure and method for making same' [patent_app_type] => utility [patent_app_number] => 11/664853 [patent_app_country] => US [patent_app_date] => 2005-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2353 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095381.pdf [firstpage_image] =>[orig_patent_app_number] => 11664853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/664853
Gate structure and method for making same Oct 4, 2005 Abandoned
Array ( [id] => 377023 [patent_doc_number] => 07312123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/240375 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 94 [patent_no_of_words] => 20408 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 466 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/312/07312123.pdf [firstpage_image] =>[orig_patent_app_number] => 11240375 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240375
Semiconductor device and a method of manufacturing the same Oct 2, 2005 Issued
Array ( [id] => 5713234 [patent_doc_number] => 20060076597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers' [patent_app_type] => utility [patent_app_number] => 11/235866 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5049 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20060076597.pdf [firstpage_image] =>[orig_patent_app_number] => 11235866 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/235866
Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers Sep 25, 2005 Abandoned
Array ( [id] => 5790916 [patent_doc_number] => 20060011988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Integrated circuit with multiple spacer insulating region widths' [patent_app_type] => utility [patent_app_number] => 11/231087 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3589 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20060011988.pdf [firstpage_image] =>[orig_patent_app_number] => 11231087 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/231087
Integrated circuit with multiple spacer insulating region widths Sep 19, 2005 Abandoned
Array ( [id] => 489462 [patent_doc_number] => 07214600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Method to improve transmittance of an encapsulating film' [patent_app_type] => utility [patent_app_number] => 11/229015 [patent_app_country] => US [patent_app_date] => 2005-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12552 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/214/07214600.pdf [firstpage_image] =>[orig_patent_app_number] => 11229015 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229015
Method to improve transmittance of an encapsulating film Sep 14, 2005 Issued
Array ( [id] => 8458533 [patent_doc_number] => 08294203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Contacting and filling deep-trench-isolation with tungsten' [patent_app_type] => utility [patent_app_number] => 11/574337 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3570 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11574337 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/574337
Contacting and filling deep-trench-isolation with tungsten Sep 1, 2005 Issued
Array ( [id] => 5898135 [patent_doc_number] => 20060043368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Flash cell structures and methods of formation' [patent_app_type] => utility [patent_app_number] => 11/218101 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3192 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20060043368.pdf [firstpage_image] =>[orig_patent_app_number] => 11218101 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/218101
Flash cell structures and methods of formation Aug 31, 2005 Abandoned
Array ( [id] => 827193 [patent_doc_number] => 07402861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'Memory cells and select gates of NAND memory arrays' [patent_app_type] => utility [patent_app_number] => 11/215902 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/402/07402861.pdf [firstpage_image] =>[orig_patent_app_number] => 11215902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215902
Memory cells and select gates of NAND memory arrays Aug 30, 2005 Issued
Array ( [id] => 5591043 [patent_doc_number] => 20060040495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Deposition method of TiN film having a multi-layer structure' [patent_app_type] => utility [patent_app_number] => 11/205990 [patent_app_country] => US [patent_app_date] => 2005-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3333 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20060040495.pdf [firstpage_image] =>[orig_patent_app_number] => 11205990 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/205990
Deposition method of TiN thin film having a multi-layer structure Aug 16, 2005 Issued
Array ( [id] => 453071 [patent_doc_number] => 07247581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Methods for treating pluralities of discrete semiconductor substrates' [patent_app_type] => utility [patent_app_number] => 11/206340 [patent_app_country] => US [patent_app_date] => 2005-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6385 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247581.pdf [firstpage_image] =>[orig_patent_app_number] => 11206340 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/206340
Methods for treating pluralities of discrete semiconductor substrates Aug 16, 2005 Issued
Array ( [id] => 5903383 [patent_doc_number] => 20060046336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Method for manufacturing display device' [patent_app_type] => utility [patent_app_number] => 11/205220 [patent_app_country] => US [patent_app_date] => 2005-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 44618 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046336.pdf [firstpage_image] =>[orig_patent_app_number] => 11205220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/205220
Method for manufacturing display device Aug 16, 2005 Issued
Array ( [id] => 292292 [patent_doc_number] => 07544582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/205540 [patent_app_country] => US [patent_app_date] => 2005-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3326 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/544/07544582.pdf [firstpage_image] =>[orig_patent_app_number] => 11205540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/205540
Semiconductor device and method for fabricating the same Aug 15, 2005 Issued
Array ( [id] => 5881017 [patent_doc_number] => 20060030100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/201090 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 17754 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20060030100.pdf [firstpage_image] =>[orig_patent_app_number] => 11201090 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201090
Semiconductor device and method for fabricating the same Aug 10, 2005 Issued
Array ( [id] => 360089 [patent_doc_number] => 07485968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => '3D IC method and device' [patent_app_type] => utility [patent_app_number] => 11/201321 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 94 [patent_no_of_words] => 20441 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485968.pdf [firstpage_image] =>[orig_patent_app_number] => 11201321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201321
3D IC method and device Aug 10, 2005 Issued
Array ( [id] => 5154474 [patent_doc_number] => 20070037357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Method for removing photoresist using a thermal bake in the presence of hydrogen and a semiconductor device manufactured using the same' [patent_app_type] => utility [patent_app_number] => 11/201930 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3272 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20070037357.pdf [firstpage_image] =>[orig_patent_app_number] => 11201930 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201930
Method for removing photoresist using a thermal bake in the presence of hydrogen and a semiconductor device manufactured using the same Aug 10, 2005 Issued
Array ( [id] => 465235 [patent_doc_number] => 07238989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement' [patent_app_type] => utility [patent_app_number] => 11/201990 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3609 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/238/07238989.pdf [firstpage_image] =>[orig_patent_app_number] => 11201990 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201990
Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement Aug 10, 2005 Issued
Array ( [id] => 843506 [patent_doc_number] => 07387940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry' [patent_app_type] => utility [patent_app_number] => 11/200286 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/387/07387940.pdf [firstpage_image] =>[orig_patent_app_number] => 11200286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/200286
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry Aug 8, 2005 Issued
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