Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 239504 [patent_doc_number] => 07592221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-22 [patent_title] => 'Semiconductor memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/199258 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 5341 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/592/07592221.pdf [firstpage_image] =>[orig_patent_app_number] => 11199258 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199258
Semiconductor memory device and manufacturing method thereof Aug 8, 2005 Issued
Array ( [id] => 5608617 [patent_doc_number] => 20060270133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Semiconductor device and its manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/199380 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270133.pdf [firstpage_image] =>[orig_patent_app_number] => 11199380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199380
Semiconductor device and its manufacturing method Aug 8, 2005 Issued
Array ( [id] => 377048 [patent_doc_number] => 07312148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Copper barrier reflow process employing high speed optical annealing' [patent_app_type] => utility [patent_app_number] => 11/199570 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 89 [patent_no_of_words] => 27266 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/312/07312148.pdf [firstpage_image] =>[orig_patent_app_number] => 11199570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199570
Copper barrier reflow process employing high speed optical annealing Aug 7, 2005 Issued
Array ( [id] => 496900 [patent_doc_number] => 07208386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Drain extended MOS transistor with improved breakdown robustness' [patent_app_type] => utility [patent_app_number] => 11/198038 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7033 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/208/07208386.pdf [firstpage_image] =>[orig_patent_app_number] => 11198038 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198038
Drain extended MOS transistor with improved breakdown robustness Aug 4, 2005 Issued
Array ( [id] => 7221347 [patent_doc_number] => 20050260834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Method for forming a semiconductor' [patent_app_type] => utility [patent_app_number] => 11/193429 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20050260834.pdf [firstpage_image] =>[orig_patent_app_number] => 11193429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/193429
Method for forming a semiconductor Jul 31, 2005 Issued
Array ( [id] => 703106 [patent_doc_number] => 07064402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 11/189851 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4651 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064402.pdf [firstpage_image] =>[orig_patent_app_number] => 11189851 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/189851
Magnetic random access memory Jul 26, 2005 Issued
Array ( [id] => 397951 [patent_doc_number] => 07294920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-13 [patent_title] => 'Wafer-leveled chip packaging structure and method thereof' [patent_app_type] => utility [patent_app_number] => 11/186840 [patent_app_country] => US [patent_app_date] => 2005-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4779 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/294/07294920.pdf [firstpage_image] =>[orig_patent_app_number] => 11186840 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/186840
Wafer-leveled chip packaging structure and method thereof Jul 21, 2005 Issued
Array ( [id] => 386621 [patent_doc_number] => 07303990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Nickel-silicon compound forming method, semiconductor device manufacturing method, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/185157 [patent_app_country] => US [patent_app_date] => 2005-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4245 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/303/07303990.pdf [firstpage_image] =>[orig_patent_app_number] => 11185157 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/185157
Nickel-silicon compound forming method, semiconductor device manufacturing method, and semiconductor device Jul 19, 2005 Issued
Array ( [id] => 5593834 [patent_doc_number] => 20060157750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Semiconductor device having etch-resistant L-shaped spacer and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/171810 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157750.pdf [firstpage_image] =>[orig_patent_app_number] => 11171810 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/171810
Semiconductor device having etch-resistant L-shaped spacer and fabrication method thereof Jun 29, 2005 Abandoned
Array ( [id] => 5715679 [patent_doc_number] => 20060079042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Thin film transistor and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/172070 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3713 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20060079042.pdf [firstpage_image] =>[orig_patent_app_number] => 11172070 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/172070
Thin film transistor and manufacturing method thereof Jun 29, 2005 Issued
Array ( [id] => 191342 [patent_doc_number] => 07642655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Semiconductor device and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 11/142560 [patent_app_country] => US [patent_app_date] => 2005-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5318 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642655.pdf [firstpage_image] =>[orig_patent_app_number] => 11142560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/142560
Semiconductor device and method of manufacture thereof May 31, 2005 Issued
Array ( [id] => 5889199 [patent_doc_number] => 20060276015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Method and apparatus for reducing dielectric charging in MEMS structures' [patent_app_type] => utility [patent_app_number] => 11/143410 [patent_app_country] => US [patent_app_date] => 2005-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20060276015.pdf [firstpage_image] =>[orig_patent_app_number] => 11143410 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/143410
Method and apparatus for reducing dielectric charging in MEMS structures May 31, 2005 Issued
Array ( [id] => 7019541 [patent_doc_number] => 20050221560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Method of forming a vertical memory device with a rectangular trench' [patent_app_type] => utility [patent_app_number] => 11/139450 [patent_app_country] => US [patent_app_date] => 2005-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1958 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20050221560.pdf [firstpage_image] =>[orig_patent_app_number] => 11139450 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/139450
Method of forming a vertical memory device with a rectangular trench May 26, 2005 Abandoned
Array ( [id] => 884397 [patent_doc_number] => 07351636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions' [patent_app_type] => utility [patent_app_number] => 11/138702 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 73 [patent_no_of_words] => 8156 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/351/07351636.pdf [firstpage_image] =>[orig_patent_app_number] => 11138702 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138702
Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions May 25, 2005 Issued
Array ( [id] => 7247967 [patent_doc_number] => 20050272204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Method for manufacturing NAND flash device' [patent_app_type] => utility [patent_app_number] => 11/138560 [patent_app_country] => US [patent_app_date] => 2005-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3534 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20050272204.pdf [firstpage_image] =>[orig_patent_app_number] => 11138560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138560
Method for manufacturing NAND flash device May 25, 2005 Issued
Array ( [id] => 578439 [patent_doc_number] => 07459727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Optoelectronic component and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 11/137680 [patent_app_country] => US [patent_app_date] => 2005-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3397 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/459/07459727.pdf [firstpage_image] =>[orig_patent_app_number] => 11137680 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/137680
Optoelectronic component and method of fabricating same May 24, 2005 Issued
Array ( [id] => 5608549 [patent_doc_number] => 20060270065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'High performance integrated inductor' [patent_app_type] => utility [patent_app_number] => 11/137974 [patent_app_country] => US [patent_app_date] => 2005-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5450 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270065.pdf [firstpage_image] =>[orig_patent_app_number] => 11137974 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/137974
High performance integrated inductor May 24, 2005 Issued
Array ( [id] => 463225 [patent_doc_number] => 07238553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-03 [patent_title] => 'Method of forming a high-voltage silicon controlled rectifier structure with improved punch through resistance' [patent_app_type] => utility [patent_app_number] => 11/134911 [patent_app_country] => US [patent_app_date] => 2005-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5626 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/238/07238553.pdf [firstpage_image] =>[orig_patent_app_number] => 11134911 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/134911
Method of forming a high-voltage silicon controlled rectifier structure with improved punch through resistance May 22, 2005 Issued
Array ( [id] => 5157369 [patent_doc_number] => 20070170413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/596220 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9766 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170413.pdf [firstpage_image] =>[orig_patent_app_number] => 11596220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/596220
Semiconductor memory May 8, 2005 Abandoned
Array ( [id] => 6924187 [patent_doc_number] => 20050237442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Electro-optical device and driving method for the same' [patent_app_type] => utility [patent_app_number] => 11/121944 [patent_app_country] => US [patent_app_date] => 2005-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10549 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237442.pdf [firstpage_image] =>[orig_patent_app_number] => 11121944 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/121944
Electro-optical device and driving method for the same May 4, 2005 Issued
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