David Vu

Array ( [id] => 7465707 [patent_doc_number] => 20040166675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Manufacturing method of electro line for semiconductor device' [patent_app_type] => new [patent_app_number] => 10/786038 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3486 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20040166675.pdf [firstpage_image] =>[orig_patent_app_number] => 10786038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1005370 [patent_doc_number] => 06905965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-14 [patent_title] => 'Reactive preclean prior to metallization for sub-quarter micron application' [patent_app_type] => utility [patent_app_number] => 10/780105 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/905/06905965.pdf [firstpage_image] =>[orig_patent_app_number] => 10780105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7421013 [patent_doc_number] => 20040160802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Read only memory devices including thermally oxidized transistor sidewalls' [patent_app_type] => new [patent_app_number] => 10/776886 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4200 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160802.pdf [firstpage_image] =>[orig_patent_app_number] => 10776886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235750 [patent_doc_number] => 20040157468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Method for fabricating semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/774589 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18797 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157468.pdf [firstpage_image] =>[orig_patent_app_number] => 10774589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7005348 [patent_doc_number] => 20050170661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Method of forming a trench structure' [patent_app_type] => utility [patent_app_number] => 10/708035 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20050170661.pdf [firstpage_image] =>[orig_patent_app_number] => 10708035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7609833 [patent_doc_number] => 06998355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Flash memory device and a fabrication process thereof, method of forming a dielectric film' [patent_app_type] => utility [patent_app_number] => 10/762520 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 14225 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998355.pdf [firstpage_image] =>[orig_patent_app_number] => 10762520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7309247 [patent_doc_number] => 20040142533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'CMOS compatible process for making a charge trapping device' [patent_app_type] => new [patent_app_number] => 10/754229 [patent_app_country] => US [patent_app_date] => 2004-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142533.pdf [firstpage_image] =>[orig_patent_app_number] => 10754229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 453955 [patent_doc_number] => 07247912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Structures and methods for making strained MOSFETs' [patent_app_type] => utility [patent_app_number] => 10/707690 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3615 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/247/07247912.pdf [firstpage_image] =>[orig_patent_app_number] => 10707690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7074905 [patent_doc_number] => 20050148173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Non-volatile memory array having vertical transistors and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/750893 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3543 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20050148173.pdf [firstpage_image] =>[orig_patent_app_number] => 10750893 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7074864 [patent_doc_number] => 20050148132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Alignment method for fabrication of integrated ultrasonic transducer array' [patent_app_type] => utility [patent_app_number] => 10/751290 [patent_app_country] => US [patent_app_date] => 2004-01-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3953 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20050148132.pdf [firstpage_image] =>[orig_patent_app_number] => 10751290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 659619 [patent_doc_number] => 07105887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Memory cell structures including a gap filling layer and methods of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/747600 [patent_app_country] => US [patent_app_date] => 2003-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1376 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/105/07105887.pdf [firstpage_image] =>[orig_patent_app_number] => 10747600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7309222 [patent_doc_number] => 20040142525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/746799 [patent_app_country] => US [patent_app_date] => 2003-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1800 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142525.pdf [firstpage_image] =>[orig_patent_app_number] => 10746799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 879804 [patent_doc_number] => 07354834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Semiconductor devices and methods to form trenches in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/746089 [patent_app_country] => US [patent_app_date] => 2003-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2666 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/354/07354834.pdf [firstpage_image] =>[orig_patent_app_number] => 10746089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 641714 [patent_doc_number] => 07122413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Method to manufacture silicon quantum islands and single-electron devices' [patent_app_type] => utility [patent_app_number] => 10/741489 [patent_app_country] => US [patent_app_date] => 2003-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4449 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/122/07122413.pdf [firstpage_image] =>[orig_patent_app_number] => 10741489 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1037818 [patent_doc_number] => 06872970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-29 [patent_title] => 'Photoresponsive devices' [patent_app_type] => utility [patent_app_number] => 10/740199 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4445 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/872/06872970.pdf [firstpage_image] =>[orig_patent_app_number] => 10740199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7429405 [patent_doc_number] => 20040161920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => new [patent_app_number] => 10/733799 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4225 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20040161920.pdf [firstpage_image] =>[orig_patent_app_number] => 10733799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7275804 [patent_doc_number] => 20040235255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Method of manufacturing semiconductor device capable of suppressing impurity concentration reduction in doped channel region arising from formation of gate insulating film' [patent_app_type] => new [patent_app_number] => 10/730099 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 11214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20040235255.pdf [firstpage_image] =>[orig_patent_app_number] => 10730099 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1104758 [patent_doc_number] => 06812062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Molded wafer scale cap' [patent_app_type] => B2 [patent_app_number] => 10/728799 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 5083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812062.pdf [firstpage_image] =>[orig_patent_app_number] => 10728799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1014564 [patent_doc_number] => 06893906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Electro-optical device and driving method for the same' [patent_app_type] => utility [patent_app_number] => 10/728989 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 10549 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/893/06893906.pdf [firstpage_image] =>[orig_patent_app_number] => 10728989 [rel_patent_id] =>[rel_patent_doc_number] =>)