David Vu

Array ( [id] => 7675094 [patent_doc_number] => 20040127024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Method for fabricating contact pad of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/660299 [patent_app_country] => US [patent_app_date] => 2003-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2599 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20040127024.pdf [firstpage_image] =>[orig_patent_app_number] => 10660299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7429425 [patent_doc_number] => 20040161925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Method of manufacturing master disc' [patent_app_type] => new [patent_app_number] => 10/658599 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20040161925.pdf [firstpage_image] =>[orig_patent_app_number] => 10658599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7212738 [patent_doc_number] => 20050054169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'METHOD OF MANUFACTURE OF RAISED SOURCE DRAIN MOSFET WITH TOP NOTCHED GATE STRUCTURE FILLED WITH DIELECTRIC PLUG IN AND DEVICE MANUFACTURED THEREBY' [patent_app_type] => utility [patent_app_number] => 10/605100 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20050054169.pdf [firstpage_image] =>[orig_patent_app_number] => 10605100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 982248 [patent_doc_number] => 06927092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Method of forming a shared global word line MRAM structure' [patent_app_type] => utility [patent_app_number] => 10/656758 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4712 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927092.pdf [firstpage_image] =>[orig_patent_app_number] => 10656758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7212629 [patent_doc_number] => 20050054149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'METHOD FOR INTEGRATING METALS HAVING DIFFERENT WORK FUNCTIONS TO FOM CMOS GATES HAVING A HIGH-K GATE DIELECTRIC AND RELATED STRUCTURE' [patent_app_type] => utility [patent_app_number] => 10/654689 [patent_app_country] => US [patent_app_date] => 2003-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3293 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20050054149.pdf [firstpage_image] =>[orig_patent_app_number] => 10654689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235500 [patent_doc_number] => 20040157436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Mechanically reinforced highly porous low dielectric constant films' [patent_app_type] => new [patent_app_number] => 10/654299 [patent_app_country] => US [patent_app_date] => 2003-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4968 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157436.pdf [firstpage_image] =>[orig_patent_app_number] => 10654299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1002350 [patent_doc_number] => 06908804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Bipolar transistor, semiconductor device and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 10/648870 [patent_app_country] => US [patent_app_date] => 2003-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5348 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/908/06908804.pdf [firstpage_image] =>[orig_patent_app_number] => 10648870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7083382 [patent_doc_number] => 20050048762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Integrated circuit capacitor in multi-level metallization' [patent_app_type] => utility [patent_app_number] => 10/650100 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2351 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20050048762.pdf [firstpage_image] =>[orig_patent_app_number] => 10650100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 951337 [patent_doc_number] => 06960539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Substrate for electronic devices, manufacturing method therefor, and electronic device' [patent_app_type] => utility [patent_app_number] => 10/644989 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 12619 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960539.pdf [firstpage_image] =>[orig_patent_app_number] => 10644989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 951309 [patent_doc_number] => 06960511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/642889 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 7392 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960511.pdf [firstpage_image] =>[orig_patent_app_number] => 10642889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1112936 [patent_doc_number] => 06803293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Method of processing a semiconductor wafer' [patent_app_type] => B2 [patent_app_number] => 10/362489 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2663 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803293.pdf [firstpage_image] =>[orig_patent_app_number] => 10362489 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7395323 [patent_doc_number] => 20040038522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Method of fabricating a semiconductor interconnect structure' [patent_app_type] => new [patent_app_number] => 10/641540 [patent_app_country] => US [patent_app_date] => 2003-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2707 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20040038522.pdf [firstpage_image] =>[orig_patent_app_number] => 10641540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6971898 [patent_doc_number] => 20050037608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Deep filled vias' [patent_app_type] => utility [patent_app_number] => 10/639989 [patent_app_country] => US [patent_app_date] => 2003-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6061 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20050037608.pdf [firstpage_image] =>[orig_patent_app_number] => 10639989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7352703 [patent_doc_number] => 20040048403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Single crystal, tunneling and capacitive, three-axes sensor using eutectic bonding and a method of making same' [patent_app_type] => new [patent_app_number] => 10/639289 [patent_app_country] => US [patent_app_date] => 2003-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7354 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20040048403.pdf [firstpage_image] =>[orig_patent_app_number] => 10639289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7368764 [patent_doc_number] => 20040026755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Thin film resonator and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/636584 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6415 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20040026755.pdf [firstpage_image] =>[orig_patent_app_number] => 10636584 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7423706 [patent_doc_number] => 20040229448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Method for transforming an amorphous silicon layer into a polysilicon layer' [patent_app_type] => new [patent_app_number] => 10/635489 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2216 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20040229448.pdf [firstpage_image] =>[orig_patent_app_number] => 10635489 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 707621 [patent_doc_number] => 07060564 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-13 [patent_title] => 'Memory device and method of simultaneous fabrication of core and periphery of same' [patent_app_type] => utility [patent_app_number] => 10/635089 [patent_app_country] => US [patent_app_date] => 2003-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5557 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/060/07060564.pdf [firstpage_image] =>[orig_patent_app_number] => 10635089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 668442 [patent_doc_number] => 07094683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Dual damascene method for ultra low K dielectrics' [patent_app_type] => utility [patent_app_number] => 10/633909 [patent_app_country] => US [patent_app_date] => 2003-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/094/07094683.pdf [firstpage_image] =>[orig_patent_app_number] => 10633909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7400415 [patent_doc_number] => 20040023437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method for optical module packaging of flip chip bonding' [patent_app_type] => new [patent_app_number] => 10/632589 [patent_app_country] => US [patent_app_date] => 2003-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3772 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20040023437.pdf [firstpage_image] =>[orig_patent_app_number] => 10632589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7296467 [patent_doc_number] => 20040214391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Method for fabricating bottle-shaped trench capacitor' [patent_app_type] => new [patent_app_number] => 10/628899 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2304 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20040214391.pdf [firstpage_image] =>[orig_patent_app_number] => 10628899 [rel_patent_id] =>[rel_patent_doc_number] =>)