Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6843221 [patent_doc_number] => 20030148568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Flash memory device and fabrication process thereof, method of forming a dielectric film' [patent_app_type] => new [patent_app_number] => 10/359701 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14345 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 25 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148568.pdf [firstpage_image] =>[orig_patent_app_number] => 10359701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359701
Flash memory device and fabrication process thereof, method of forming a dielectric film Feb 6, 2003 Issued
Array ( [id] => 6785768 [patent_doc_number] => 20030137007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Flash memory device and fabrication process thereof, method of forming a dielectric film' [patent_app_type] => new [patent_app_number] => 10/359592 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14351 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 25 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20030137007.pdf [firstpage_image] =>[orig_patent_app_number] => 10359592 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359592
Flash memory device and fabrication process thereof, method of forming a dielectric film Feb 6, 2003 Issued
Array ( [id] => 6843282 [patent_doc_number] => 20030148629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Flash memory device and fabrication process thereof, method of forming a dielectric film' [patent_app_type] => new [patent_app_number] => 10/359714 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14345 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 25 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148629.pdf [firstpage_image] =>[orig_patent_app_number] => 10359714 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359714
Flash memory device and fabrication process thereof, method of forming a dielectric film Feb 6, 2003 Issued
Array ( [id] => 1216490 [patent_doc_number] => 06706613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Methods for manufacturing stacked gates including oxide/nitride/oxide (ONO) interlayer dielectrics using pre-annealing and/or post-annealing in nitrogen' [patent_app_type] => B2 [patent_app_number] => 10/359789 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 0 [patent_no_of_words] => 4628 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706613.pdf [firstpage_image] =>[orig_patent_app_number] => 10359789 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359789
Methods for manufacturing stacked gates including oxide/nitride/oxide (ONO) interlayer dielectrics using pre-annealing and/or post-annealing in nitrogen Feb 5, 2003 Issued
Array ( [id] => 737375 [patent_doc_number] => 07033957 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-25 [patent_title] => 'ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devices' [patent_app_type] => utility [patent_app_number] => 10/358586 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 10995 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/033/07033957.pdf [firstpage_image] =>[orig_patent_app_number] => 10358586 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358586
ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devices Feb 4, 2003 Issued
Array ( [id] => 7287296 [patent_doc_number] => 20040147092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-29 [patent_title] => 'METHOD FOR FABRICATING THIN FILM TRANSISTOR DISPLAY DEVICE' [patent_app_type] => new [patent_app_number] => 10/353180 [patent_app_country] => US [patent_app_date] => 2003-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3197 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20040147092.pdf [firstpage_image] =>[orig_patent_app_number] => 10353180 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/353180
Method for fabricating thin film transistor display device Jan 27, 2003 Issued
Array ( [id] => 1202740 [patent_doc_number] => 06720269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Semiconductor device having a self-aligned contact structure and methods of forming the same' [patent_app_type] => B2 [patent_app_number] => 10/347219 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 12162 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720269.pdf [firstpage_image] =>[orig_patent_app_number] => 10347219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/347219
Semiconductor device having a self-aligned contact structure and methods of forming the same Jan 20, 2003 Issued
Array ( [id] => 6706440 [patent_doc_number] => 20030153174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Methods for making a paste of materials to form bumps for screen print processes' [patent_app_type] => new [patent_app_number] => 10/346280 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2418 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20030153174.pdf [firstpage_image] =>[orig_patent_app_number] => 10346280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/346280
Methods for making a paste of materials to form bumps for screen print processes Jan 16, 2003 Issued
Array ( [id] => 436193 [patent_doc_number] => 07262451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'High performance embedded DRAM technology with strained silicon' [patent_app_type] => utility [patent_app_number] => 10/541660 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1803 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/262/07262451.pdf [firstpage_image] =>[orig_patent_app_number] => 10541660 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/541660
High performance embedded DRAM technology with strained silicon Jan 7, 2003 Issued
Array ( [id] => 1071862 [patent_doc_number] => 06841446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Fabrication method for a flash memory device' [patent_app_type] => utility [patent_app_number] => 10/338999 [patent_app_country] => US [patent_app_date] => 2003-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2917 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841446.pdf [firstpage_image] =>[orig_patent_app_number] => 10338999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/338999
Fabrication method for a flash memory device Jan 7, 2003 Issued
Array ( [id] => 7295901 [patent_doc_number] => 20040124466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'METHOD FOR FABRICATING PROGRAMMABLE MEMORY ARRAY STRUCTURES INCORPORATING SERIES-CONNECTED TRANSISTOR STRINGS' [patent_app_type] => new [patent_app_number] => 10/335089 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15962 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124466.pdf [firstpage_image] =>[orig_patent_app_number] => 10335089 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/335089
Method for fabricating programmable memory array structures incorporating series-connected transistor strings Dec 30, 2002 Issued
Array ( [id] => 6843241 [patent_doc_number] => 20030148588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Process for manufacturing low-cost and high-quality SOI substrates' [patent_app_type] => new [patent_app_number] => 10/331189 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3586 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148588.pdf [firstpage_image] =>[orig_patent_app_number] => 10331189 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/331189
Process for manufacturing low-cost and high-quality SOI substrates Dec 25, 2002 Issued
Array ( [id] => 6787777 [patent_doc_number] => 20030139016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Capacitor and manufacturing method' [patent_app_type] => new [patent_app_number] => 10/311999 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 23889 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20030139016.pdf [firstpage_image] =>[orig_patent_app_number] => 10311999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/311999
Capacitor and manufacturing method thereof Dec 22, 2002 Issued
Array ( [id] => 563098 [patent_doc_number] => 07157730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Angled wafer rotating ion implantation' [patent_app_type] => utility [patent_app_number] => 10/323889 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3840 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/157/07157730.pdf [firstpage_image] =>[orig_patent_app_number] => 10323889 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323889
Angled wafer rotating ion implantation Dec 19, 2002 Issued
Array ( [id] => 1130522 [patent_doc_number] => 06787461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method for forming a plug metal layer' [patent_app_type] => B2 [patent_app_number] => 10/320473 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4112 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787461.pdf [firstpage_image] =>[orig_patent_app_number] => 10320473 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320473
Method for forming a plug metal layer Dec 16, 2002 Issued
Array ( [id] => 7305018 [patent_doc_number] => 20040115945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Using an electron beam to write phase change memory devices' [patent_app_type] => new [patent_app_number] => 10/319098 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1773 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20040115945.pdf [firstpage_image] =>[orig_patent_app_number] => 10319098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319098
Using an electron beam to write phase change memory devices Dec 12, 2002 Abandoned
Array ( [id] => 491444 [patent_doc_number] => 07214991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'CMOS inverters configured using multiple-gate transistors' [patent_app_type] => utility [patent_app_number] => 10/313887 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 6130 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/214/07214991.pdf [firstpage_image] =>[orig_patent_app_number] => 10313887 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313887
CMOS inverters configured using multiple-gate transistors Dec 5, 2002 Issued
Array ( [id] => 6761440 [patent_doc_number] => 20030124802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication' [patent_app_type] => new [patent_app_number] => 10/313763 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11222 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20030124802.pdf [firstpage_image] =>[orig_patent_app_number] => 10313763 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313763
Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication Dec 5, 2002 Issued
Array ( [id] => 721210 [patent_doc_number] => 07049648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-23 [patent_title] => 'Semiconductor memory device for reducing damage to interlevel dielectric layer and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/309547 [patent_app_country] => US [patent_app_date] => 2002-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 43 [patent_no_of_words] => 7822 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/049/07049648.pdf [firstpage_image] =>[orig_patent_app_number] => 10309547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/309547
Semiconductor memory device for reducing damage to interlevel dielectric layer and fabrication method thereof Dec 2, 2002 Issued
Array ( [id] => 6760418 [patent_doc_number] => 20030123779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Optical device, method of manufacturing the same, optical module, circuit board and electronic instrument' [patent_app_type] => new [patent_app_number] => 10/306789 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5384 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20030123779.pdf [firstpage_image] =>[orig_patent_app_number] => 10306789 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306789
Optical device, method of manufacturing the same, optical module, circuit board and electronic instrument Nov 26, 2002 Issued
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