
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6735612
[patent_doc_number] => 20030013247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-16
[patent_title] => 'Liquid crystal device, liquid crystal display panel and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/234089
[patent_app_country] => US
[patent_app_date] => 2002-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5685
[patent_no_of_claims] => 48
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0013/20030013247.pdf
[firstpage_image] =>[orig_patent_app_number] => 10234089
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/234089 | Liquid crystal device, liquid crystal display panel and method for manufacturing the same | Sep 3, 2002 | Issued |
Array
(
[id] => 1141374
[patent_doc_number] => 06777276
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-17
[patent_title] => 'System and method for optimized laser annealing smoothing mask'
[patent_app_type] => B2
[patent_app_number] => 10/232089
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5660
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/777/06777276.pdf
[firstpage_image] =>[orig_patent_app_number] => 10232089
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/232089 | System and method for optimized laser annealing smoothing mask | Aug 28, 2002 | Issued |
Array
(
[id] => 1270017
[patent_doc_number] => 06653172
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-25
[patent_title] => 'Methods for providing void-free layers for semiconductor assemblies'
[patent_app_type] => B2
[patent_app_number] => 10/229593
[patent_app_country] => US
[patent_app_date] => 2002-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 37
[patent_no_of_words] => 9345
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/653/06653172.pdf
[firstpage_image] =>[orig_patent_app_number] => 10229593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229593 | Methods for providing void-free layers for semiconductor assemblies | Aug 27, 2002 | Issued |
Array
(
[id] => 7395046
[patent_doc_number] => 20040038480
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-26
[patent_title] => 'Method of manufacture of a PCRAM memory cell'
[patent_app_type] => new
[patent_app_number] => 10/225190
[patent_app_country] => US
[patent_app_date] => 2002-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4738
[patent_no_of_claims] => 109
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20040038480.pdf
[firstpage_image] =>[orig_patent_app_number] => 10225190
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/225190 | Method of manufacture of a resistance variable memory cell | Aug 21, 2002 | Issued |
Array
(
[id] => 6755920
[patent_doc_number] => 20030003697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers'
[patent_app_type] => new
[patent_app_number] => 10/226008
[patent_app_country] => US
[patent_app_date] => 2002-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5066
[patent_no_of_claims] => 71
[patent_no_of_ind_claims] => 24
[patent_words_short_claim] => 11
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20030003697.pdf
[firstpage_image] =>[orig_patent_app_number] => 10226008
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/226008 | Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers | Aug 20, 2002 | Abandoned |
Array
(
[id] => 1347152
[patent_doc_number] => 06579764
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-17
[patent_title] => 'Integrated circuit memory devices having non-volatile memory transistors and methods of fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 10/222299
[patent_app_country] => US
[patent_app_date] => 2002-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 6496
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/579/06579764.pdf
[firstpage_image] =>[orig_patent_app_number] => 10222299
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/222299 | Integrated circuit memory devices having non-volatile memory transistors and methods of fabricating the same | Aug 14, 2002 | Issued |
Array
(
[id] => 6688554
[patent_doc_number] => 20030032279
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Method for forming a metallization layer'
[patent_app_type] => new
[patent_app_number] => 10/217618
[patent_app_country] => US
[patent_app_date] => 2002-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1927
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20030032279.pdf
[firstpage_image] =>[orig_patent_app_number] => 10217618
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/217618 | Semiconductor manufacturing system for forming metallization layer | Aug 12, 2002 | Issued |
Array
(
[id] => 6530427
[patent_doc_number] => 20020192912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Asymmetric gates for high density DRAM'
[patent_app_type] => new
[patent_app_number] => 10/213061
[patent_app_country] => US
[patent_app_date] => 2002-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4430
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0192/20020192912.pdf
[firstpage_image] =>[orig_patent_app_number] => 10213061
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/213061 | Asymmetric gates for high density DRAM | Aug 5, 2002 | Issued |
Array
(
[id] => 6720910
[patent_doc_number] => 20030054599
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-20
[patent_title] => 'Bipolar transistor, semiconductor device and method of manufacturing same'
[patent_app_type] => new
[patent_app_number] => 10/210499
[patent_app_country] => US
[patent_app_date] => 2002-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5360
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0054/20030054599.pdf
[firstpage_image] =>[orig_patent_app_number] => 10210499
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/210499 | Bipolar transistor, semiconductor device and method of manufacturing same | Jul 31, 2002 | Issued |
Array
(
[id] => 1110940
[patent_doc_number] => 06806147
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-19
[patent_title] => 'Method and apparatus for suppressing the channeling effect in high energy deep well implantation'
[patent_app_type] => B1
[patent_app_number] => 10/211190
[patent_app_country] => US
[patent_app_date] => 2002-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1600
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/806/06806147.pdf
[firstpage_image] =>[orig_patent_app_number] => 10211190
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/211190 | Method and apparatus for suppressing the channeling effect in high energy deep well implantation | Jul 31, 2002 | Issued |
Array
(
[id] => 6816868
[patent_doc_number] => 20030067826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-10
[patent_title] => 'Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages'
[patent_app_type] => new
[patent_app_number] => 10/209988
[patent_app_country] => US
[patent_app_date] => 2002-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6366
[patent_no_of_claims] => 57
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20030067826.pdf
[firstpage_image] =>[orig_patent_app_number] => 10209988
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/209988 | Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages | Jul 30, 2002 | Issued |
Array
(
[id] => 1155915
[patent_doc_number] => 06762070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-13
[patent_title] => 'Method of manufacturing group III nitride compound semiconductor light emitting device having a light emission output of high light intensity'
[patent_app_type] => B2
[patent_app_number] => 10/192699
[patent_app_country] => US
[patent_app_date] => 2002-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5628
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/762/06762070.pdf
[firstpage_image] =>[orig_patent_app_number] => 10192699
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/192699 | Method of manufacturing group III nitride compound semiconductor light emitting device having a light emission output of high light intensity | Jul 10, 2002 | Issued |
Array
(
[id] => 7296600
[patent_doc_number] => 20040214445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Dry etching method'
[patent_app_type] => new
[patent_app_number] => 10/482405
[patent_app_country] => US
[patent_app_date] => 2004-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5703
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20040214445.pdf
[firstpage_image] =>[orig_patent_app_number] => 10482405
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/482405 | Dry etching method | Jul 4, 2002 | Issued |
Array
(
[id] => 1246642
[patent_doc_number] => 06677639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-13
[patent_title] => 'Non-volatile memory device and method for fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 10/188389
[patent_app_country] => US
[patent_app_date] => 2002-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3288
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/677/06677639.pdf
[firstpage_image] =>[orig_patent_app_number] => 10188389
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/188389 | Non-volatile memory device and method for fabricating the same | Jun 30, 2002 | Issued |
Array
(
[id] => 7997211
[patent_doc_number] => 08080453
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-12-20
[patent_title] => 'Gate stack having nitride layer'
[patent_app_type] => utility
[patent_app_number] => 10/186453
[patent_app_country] => US
[patent_app_date] => 2002-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3293
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/080/08080453.pdf
[firstpage_image] =>[orig_patent_app_number] => 10186453
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186453 | Gate stack having nitride layer | Jun 27, 2002 | Issued |
Array
(
[id] => 699052
[patent_doc_number] => 07067428
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-06-27
[patent_title] => 'Method for cleaning polysilicon'
[patent_app_type] => utility
[patent_app_number] => 10/185400
[patent_app_country] => US
[patent_app_date] => 2002-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2290
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/067/07067428.pdf
[firstpage_image] =>[orig_patent_app_number] => 10185400
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185400 | Method for cleaning polysilicon | Jun 26, 2002 | Issued |
Array
(
[id] => 7471306
[patent_doc_number] => 20040121511
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'Packaging of a microchip device-I'
[patent_app_type] => new
[patent_app_number] => 10/312588
[patent_app_country] => US
[patent_app_date] => 2003-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5057
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0121/20040121511.pdf
[firstpage_image] =>[orig_patent_app_number] => 10312588
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/312588 | Packaging of a microchip device | Jun 18, 2002 | Issued |
Array
(
[id] => 6469190
[patent_doc_number] => 20020151109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-17
[patent_title] => 'Coils integrated in IC-package'
[patent_app_type] => new
[patent_app_number] => 10/172000
[patent_app_country] => US
[patent_app_date] => 2002-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3365
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20020151109.pdf
[firstpage_image] =>[orig_patent_app_number] => 10172000
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/172000 | Coils integrated in IC-package | Jun 16, 2002 | Issued |
Array
(
[id] => 6176677
[patent_doc_number] => 20020155657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Semiconductor integrated circuit and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/157978
[patent_app_country] => US
[patent_app_date] => 2002-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 11302
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 16
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20020155657.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157978
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157978 | Semiconductor integrated circuit and method for manufacturing the same | May 30, 2002 | Issued |
Array
(
[id] => 1386351
[patent_doc_number] => 06548390
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-15
[patent_title] => 'SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY'
[patent_app_type] => B1
[patent_app_number] => 10/153830
[patent_app_country] => US
[patent_app_date] => 2002-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 3037
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/548/06548390.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153830
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153830 | SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY | May 20, 2002 | Issued |