
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6469691
[patent_doc_number] => 20020151163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-17
[patent_title] => 'Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random access memory (DRAM) circuitry'
[patent_app_type] => new
[patent_app_number] => 10/137100
[patent_app_country] => US
[patent_app_date] => 2002-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20020151163.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137100
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137100 | Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random | Apr 30, 2002 | Issued |
Array
(
[id] => 6635552
[patent_doc_number] => 20030006465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Semiconductor device and method of making the same'
[patent_app_type] => new
[patent_app_number] => 10/127507
[patent_app_country] => US
[patent_app_date] => 2002-04-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0006/20030006465.pdf
[firstpage_image] =>[orig_patent_app_number] => 10127507
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/127507 | Semiconductor device and method of making the same | Apr 22, 2002 | Issued |
Array
(
[id] => 6783125
[patent_doc_number] => 20030064572
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication'
[patent_app_type] => new
[patent_app_number] => 10/128188
[patent_app_country] => US
[patent_app_date] => 2002-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => publications/A1/0064/20030064572.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128188
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128188 | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication | Apr 21, 2002 | Issued |
Array
(
[id] => 6176805
[patent_doc_number] => 20020155699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => new
[patent_app_number] => 10/124389
[patent_app_country] => US
[patent_app_date] => 2002-04-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0155/20020155699.pdf
[firstpage_image] =>[orig_patent_app_number] => 10124389
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/124389 | Semiconductor device and method of fabricating the same | Apr 17, 2002 | Issued |
Array
(
[id] => 6765789
[patent_doc_number] => 20030100189
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Method for increasing the capacity of an integrated circuit device'
[patent_app_type] => new
[patent_app_number] => 10/122188
[patent_app_country] => US
[patent_app_date] => 2002-04-16
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0100/20030100189.pdf
[firstpage_image] =>[orig_patent_app_number] => 10122188
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/122188 | Method for increasing the capacity of an integrated circuit device | Apr 15, 2002 | Issued |
Array
(
[id] => 1216308
[patent_doc_number] => 06706549
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-16
[patent_title] => 'Multi-functional micro electromechanical devices and method of bulk manufacturing same'
[patent_app_type] => B1
[patent_app_number] => 10/124689
[patent_app_country] => US
[patent_app_date] => 2002-04-12
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[pdf_file] => patents/06/706/06706549.pdf
[firstpage_image] =>[orig_patent_app_number] => 10124689
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/124689 | Multi-functional micro electromechanical devices and method of bulk manufacturing same | Apr 11, 2002 | Issued |
Array
(
[id] => 6865303
[patent_doc_number] => 20030190829
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Dual damascene barrier structures and preferential etching method'
[patent_app_type] => new
[patent_app_number] => 10/117486
[patent_app_country] => US
[patent_app_date] => 2002-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3223
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0190/20030190829.pdf
[firstpage_image] =>[orig_patent_app_number] => 10117486
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/117486 | Dual damascene barrier structures and preferential etching method | Apr 4, 2002 | Abandoned |
Array
(
[id] => 1346888
[patent_doc_number] => 06586778
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-01
[patent_title] => 'Gallium nitride semiconductor structures fabricated by pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts'
[patent_app_type] => B2
[patent_app_number] => 10/115706
[patent_app_country] => US
[patent_app_date] => 2002-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4612
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[pdf_file] => patents/06/586/06586778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10115706
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/115706 | Gallium nitride semiconductor structures fabricated by pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts | Apr 3, 2002 | Issued |
Array
(
[id] => 1209402
[patent_doc_number] => 06713388
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-30
[patent_title] => 'Method of fabricating a non-volatile memory device to eliminate charge loss'
[patent_app_type] => B2
[patent_app_number] => 10/063199
[patent_app_country] => US
[patent_app_date] => 2002-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/06/713/06713388.pdf
[firstpage_image] =>[orig_patent_app_number] => 10063199
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/063199 | Method of fabricating a non-volatile memory device to eliminate charge loss | Mar 27, 2002 | Issued |
Array
(
[id] => 1089096
[patent_doc_number] => 06828189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-07
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 10/106100
[patent_app_country] => US
[patent_app_date] => 2002-03-27
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[pdf_file] => patents/06/828/06828189.pdf
[firstpage_image] =>[orig_patent_app_number] => 10106100
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/106100 | Semiconductor device and method of fabricating the same | Mar 26, 2002 | Issued |
Array
(
[id] => 5986486
[patent_doc_number] => 20020098698
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[patent_issue_date] => 2002-07-25
[patent_title] => 'Method for polishing semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/103689
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[firstpage_image] =>[orig_patent_app_number] => 10103689
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/103689 | Method for polishing semiconductor device | Mar 24, 2002 | Issued |
Array
(
[id] => 1182092
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[patent_title] => 'Semiconductor device and manufacturing method thereof'
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[firstpage_image] =>[orig_patent_app_number] => 10100090
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/100090 | Semiconductor device and manufacturing method thereof | Mar 18, 2002 | Issued |
Array
(
[id] => 6838905
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[patent_title] => 'Wafer and production thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/098389 | Wafer and production thereof | Mar 17, 2002 | Issued |
Array
(
[id] => 1096012
[patent_doc_number] => 06821864
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[patent_issue_date] => 2004-11-23
[patent_title] => 'Method to achieve increased trench depth, independent of CD as defined by lithography'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/093789 | Method to achieve increased trench depth, independent of CD as defined by lithography | Mar 6, 2002 | Issued |
Array
(
[id] => 6711204
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[patent_issue_date] => 2003-09-11
[patent_title] => 'METHOD FOR FORMING THE SELF-ALIGNED BURIED N+ TYPE TO DIFFUSION PROCESS IN ETOX FLASH CELL'
[patent_app_type] => new
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[firstpage_image] =>[orig_patent_app_number] => 10092998
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/092998 | Method for forming the self-aligned buried N type to diffusion process in ETOX flash cell | Mar 5, 2002 | Issued |
Array
(
[id] => 1141525
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[patent_title] => 'Thick wafer processing and resultant products'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/087989 | Thick wafer processing and resultant products | Mar 4, 2002 | Issued |
Array
(
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Array
(
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Array
(
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[patent_title] => 'Methods for fabricating a metal-oxide-metal capacitor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/080186 | Methods for fabricating a metal-oxide-metal capacitor | Feb 20, 2002 | Issued |
Array
(
[id] => 1253299
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[patent_title] => 'Bipolar transistor produced using processes compatible with those employed in the manufacture of MOS device'
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[firstpage_image] =>[orig_patent_app_number] => 10077288
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/077288 | Bipolar transistor produced using processes compatible with those employed in the manufacture of MOS device | Feb 14, 2002 | Issued |