David Vu

Array ( [id] => 519549 [patent_doc_number] => 07193273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Method for enhancing vertical growth during the selective formation of silicon, and structures formed using same' [patent_app_type] => utility [patent_app_number] => 10/075640 [patent_app_country] => US [patent_app_date] => 2002-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2659 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193273.pdf [firstpage_image] =>[orig_patent_app_number] => 10075640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216517 [patent_doc_number] => 06706620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method for fabricating a nitride film' [patent_app_type] => B2 [patent_app_number] => 10/074589 [patent_app_country] => US [patent_app_date] => 2002-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2775 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706620.pdf [firstpage_image] =>[orig_patent_app_number] => 10074589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6706375 [patent_doc_number] => 20030153109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'USING ORGANIC MATERIALS IN MAKING AN ORGANIC LIGHT-EMITTING DEVICE' [patent_app_type] => new [patent_app_number] => 10/073690 [patent_app_country] => US [patent_app_date] => 2002-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9142 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20030153109.pdf [firstpage_image] =>[orig_patent_app_number] => 10073690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6081113 [patent_doc_number] => 20020081805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Method and structure for an improved floating gate memory cell' [patent_app_type] => new [patent_app_number] => 10/068198 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8271 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20020081805.pdf [firstpage_image] =>[orig_patent_app_number] => 10068198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1318967 [patent_doc_number] => 06608346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method and structure for an improved floating gate memory cell' [patent_app_type] => B2 [patent_app_number] => 10/068211 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8231 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608346.pdf [firstpage_image] =>[orig_patent_app_number] => 10068211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6630230 [patent_doc_number] => 20020086482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Method and structure for an improved floating gate memory cell' [patent_app_type] => new [patent_app_number] => 10/068698 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8221 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20020086482.pdf [firstpage_image] =>[orig_patent_app_number] => 10068698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1323939 [patent_doc_number] => 06602731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Manufacturing of a thin inorganic light emitting diode' [patent_app_type] => B2 [patent_app_number] => 10/053990 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8558 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602731.pdf [firstpage_image] =>[orig_patent_app_number] => 10053990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5964491 [patent_doc_number] => 20020088972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Abrupt pn junction diode formed using chemical vapor deposition processing' [patent_app_type] => new [patent_app_number] => 10/053985 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6754 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20020088972.pdf [firstpage_image] =>[orig_patent_app_number] => 10053985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1278132 [patent_doc_number] => 06645882 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Preparation of composite high-K/standard-K dielectrics for semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 10/051790 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 8550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/645/06645882.pdf [firstpage_image] =>[orig_patent_app_number] => 10051790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1165087 [patent_doc_number] => 06752899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Acoustic microbalance for in-situ deposition process monitoring and control' [patent_app_type] => B1 [patent_app_number] => 10/050499 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4321 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/752/06752899.pdf [firstpage_image] =>[orig_patent_app_number] => 10050499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5828699 [patent_doc_number] => 20020068401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Novel method and structure for stacked DRAM capacitors and FETs for embedded DRAM circuits' [patent_app_type] => new [patent_app_number] => 10/043606 [patent_app_country] => US [patent_app_date] => 2002-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3666 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20020068401.pdf [firstpage_image] =>[orig_patent_app_number] => 10043606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6659707 [patent_doc_number] => 20030134482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Ion-implantation and shallow etching to produce effective edge termination in high-voltage heterojunction bipolar transistors' [patent_app_type] => new [patent_app_number] => 10/044689 [patent_app_country] => US [patent_app_date] => 2002-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2517 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20030134482.pdf [firstpage_image] =>[orig_patent_app_number] => 10044689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1503459 [patent_doc_number] => 06465305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Methods and circuits employing threshold voltages for mask-alignment detection' [patent_app_type] => B1 [patent_app_number] => 10/043962 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5142 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465305.pdf [firstpage_image] =>[orig_patent_app_number] => 10043962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7631342 [patent_doc_number] => 06635590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Apparatus and method for in-situ removal of polymer residue' [patent_app_type] => B2 [patent_app_number] => 10/042890 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635590.pdf [firstpage_image] =>[orig_patent_app_number] => 10042890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6348781 [patent_doc_number] => 20020056856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Saw singulated leadless plastic chip carrier' [patent_app_type] => new [patent_app_number] => 10/026399 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4168 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20020056856.pdf [firstpage_image] =>[orig_patent_app_number] => 10026399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1225215 [patent_doc_number] => 06700202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-02 [patent_title] => 'Semiconductor device having reduced oxidation interface' [patent_app_type] => B2 [patent_app_number] => 10/013182 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3324 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700202.pdf [firstpage_image] =>[orig_patent_app_number] => 10013182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 482744 [patent_doc_number] => 07220669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Thin films for magnetic device' [patent_app_type] => utility [patent_app_number] => 09/997396 [patent_app_country] => US [patent_app_date] => 2001-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7028 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/220/07220669.pdf [firstpage_image] =>[orig_patent_app_number] => 09997396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6539228 [patent_doc_number] => 20020137270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Method of fabricating a flash memory device' [patent_app_type] => new [patent_app_number] => 09/995299 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4341 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20020137270.pdf [firstpage_image] =>[orig_patent_app_number] => 09995299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1574867 [patent_doc_number] => 06468925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-22 [patent_title] => 'Plasma enhanced chemical vapor deposition process' [patent_app_type] => B2 [patent_app_number] => 09/995387 [patent_app_country] => US [patent_app_date] => 2001-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2850 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/468/06468925.pdf [firstpage_image] =>[orig_patent_app_number] => 09995387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1332529 [patent_doc_number] => 06596626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method for arranging wiring line including power reinforcing line and semiconductor device having power reinforcing line' [patent_app_type] => B2 [patent_app_number] => 09/995496 [patent_app_country] => US [patent_app_date] => 2001-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3311 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596626.pdf [firstpage_image] =>[orig_patent_app_number] => 09995496 [rel_patent_id] =>[rel_patent_doc_number] =>)