Search

David Vu

Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2048
Issued Applications
1711
Pending Applications
95
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6898590 [patent_doc_number] => 20010046755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Polycrystalline semiconductor device and its manufacture method' [patent_app_type] => new [patent_app_number] => 09/909696 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20010046755.pdf [firstpage_image] =>[orig_patent_app_number] => 09909696 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/909696
Polycrystalline semiconductor device and its manufacture method Jul 19, 2001 Issued
Array ( [id] => 1571112 [patent_doc_number] => 06498358 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-24 [patent_title] => 'Structure and method for fabricating an electro-optic system having an electrochromic diffraction grating' [patent_app_type] => B1 [patent_app_number] => 09/908898 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 18775 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498358.pdf [firstpage_image] =>[orig_patent_app_number] => 09908898 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/908898
Structure and method for fabricating an electro-optic system having an electrochromic diffraction grating Jul 19, 2001 Issued
Array ( [id] => 1553083 [patent_doc_number] => 06400022 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Semiconductor device and fabrication process therefor and capacitor structure' [patent_app_type] => B1 [patent_app_number] => 09/907689 [patent_app_country] => US [patent_app_date] => 2001-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5858 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400022.pdf [firstpage_image] =>[orig_patent_app_number] => 09907689 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/907689
Semiconductor device and fabrication process therefor and capacitor structure Jul 18, 2001 Issued
Array ( [id] => 1416751 [patent_doc_number] => 06509260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Method of shallow trench isolation using a single mask' [patent_app_type] => B1 [patent_app_number] => 09/906899 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1182 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509260.pdf [firstpage_image] =>[orig_patent_app_number] => 09906899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/906899
Method of shallow trench isolation using a single mask Jul 15, 2001 Issued
Array ( [id] => 6735636 [patent_doc_number] => 20030013271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'METHOD FOR HIGH ASPECT RATIO GAP FILL USING SEQUENTIAL HDP-CVD' [patent_app_type] => new [patent_app_number] => 09/904799 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3731 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20030013271.pdf [firstpage_image] =>[orig_patent_app_number] => 09904799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/904799
Method for high aspect ratio gap fill using sequential HDP-CVD Jul 12, 2001 Issued
Array ( [id] => 6651472 [patent_doc_number] => 20030008519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Method and apparatus for fabricating structures using chemically selective endpoint detection' [patent_app_type] => new [patent_app_number] => 09/900300 [patent_app_country] => US [patent_app_date] => 2001-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3565 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20030008519.pdf [firstpage_image] =>[orig_patent_app_number] => 09900300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/900300
Method and apparatus for fabricating structures using chemically selective endpoint detection Jul 4, 2001 Issued
Array ( [id] => 1474468 [patent_doc_number] => 06387750 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method of forming MIM capacitor' [patent_app_type] => B1 [patent_app_number] => 09/895389 [patent_app_country] => US [patent_app_date] => 2001-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1891 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387750.pdf [firstpage_image] =>[orig_patent_app_number] => 09895389 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/895389
Method of forming MIM capacitor Jul 1, 2001 Issued
Array ( [id] => 1594348 [patent_doc_number] => 06383865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for fabricating a capacitor in a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/886389 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1785 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383865.pdf [firstpage_image] =>[orig_patent_app_number] => 09886389 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886389
Method for fabricating a capacitor in a semiconductor device Jun 21, 2001 Issued
Array ( [id] => 1239713 [patent_doc_number] => 06686278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Method for forming a plug metal layer' [patent_app_type] => B2 [patent_app_number] => 09/884799 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4114 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686278.pdf [firstpage_image] =>[orig_patent_app_number] => 09884799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/884799
Method for forming a plug metal layer Jun 18, 2001 Issued
Array ( [id] => 6474531 [patent_doc_number] => 20020022360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Semiconductor memory device for eliminating floating body effect and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/882489 [patent_app_country] => US [patent_app_date] => 2001-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4792 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20020022360.pdf [firstpage_image] =>[orig_patent_app_number] => 09882489 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/882489
Semiconductor memory device for eliminating floating body effect and method of fabricating the same Jun 14, 2001 Issued
Array ( [id] => 6237430 [patent_doc_number] => 20020043662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/880089 [patent_app_country] => US [patent_app_date] => 2001-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 25828 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20020043662.pdf [firstpage_image] =>[orig_patent_app_number] => 09880089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/880089
Semiconductor device Jun 13, 2001 Issued
Array ( [id] => 6048141 [patent_doc_number] => 20020168812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Semiconductor device with multilayer wiring structure of laminated damascene wiring and fabrication method thereof' [patent_app_type] => new [patent_app_number] => 09/879779 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7804 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20020168812.pdf [firstpage_image] =>[orig_patent_app_number] => 09879779 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879779
Semiconductor device with multilayer wiring structure of laminated damascene wiring and fabrication method thereof Jun 11, 2001 Abandoned
Array ( [id] => 6879611 [patent_doc_number] => 20010030897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Redundancy mapping in a multichip semiconductor package' [patent_app_type] => new [patent_app_number] => 09/879600 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4771 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20010030897.pdf [firstpage_image] =>[orig_patent_app_number] => 09879600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879600
Redundancy mapping in a multichip semiconductor package Jun 11, 2001 Issued
Array ( [id] => 6577811 [patent_doc_number] => 20020041024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Boat and assembly method for ball grid array packages' [patent_app_type] => new [patent_app_number] => 09/872917 [patent_app_country] => US [patent_app_date] => 2001-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1953 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20020041024.pdf [firstpage_image] =>[orig_patent_app_number] => 09872917 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/872917
Boat and assembly method for ball grid array packages Jun 3, 2001 Issued
Array ( [id] => 1367675 [patent_doc_number] => 06566251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method for selective deposition of materials in micromachined molds' [patent_app_type] => B2 [patent_app_number] => 09/871200 [patent_app_country] => US [patent_app_date] => 2001-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 6040 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566251.pdf [firstpage_image] =>[orig_patent_app_number] => 09871200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/871200
Method for selective deposition of materials in micromachined molds May 30, 2001 Issued
Array ( [id] => 6503921 [patent_doc_number] => 20020025691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Flash memory device and a fabrication process thereof, method of forming a dielectric film' [patent_app_type] => new [patent_app_number] => 09/867699 [patent_app_country] => US [patent_app_date] => 2001-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14353 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 25 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20020025691.pdf [firstpage_image] =>[orig_patent_app_number] => 09867699 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/867699
Flash memory device and a fabrication process thereof, method of forming a dielectric film May 30, 2001 Issued
Array ( [id] => 6111424 [patent_doc_number] => 20020173133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Method for packaging a microelectronic device using on-die bond pad expansion' [patent_app_type] => new [patent_app_number] => 09/861689 [patent_app_country] => US [patent_app_date] => 2001-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4417 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20020173133.pdf [firstpage_image] =>[orig_patent_app_number] => 09861689 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/861689
Method for packaging a microelectronic device using on-die bond pad expansion May 20, 2001 Issued
Array ( [id] => 6063565 [patent_doc_number] => 20020031880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'CIRCUIT PROBING CONTACT PAD FORMED ON A BOND PAD IN A FLIP CHIP PACKAGE' [patent_app_type] => new [patent_app_number] => 09/861425 [patent_app_country] => US [patent_app_date] => 2001-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3412 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20020031880.pdf [firstpage_image] =>[orig_patent_app_number] => 09861425 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/861425
Circuit probing contact pad formed on a bond pad in a flip chip package May 17, 2001 Issued
Array ( [id] => 1503335 [patent_doc_number] => 06465277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-15 [patent_title] => 'Molding apparatus and molding method for flexible substrate based package' [patent_app_type] => B2 [patent_app_number] => 09/854488 [patent_app_country] => US [patent_app_date] => 2001-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2268 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465277.pdf [firstpage_image] =>[orig_patent_app_number] => 09854488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/854488
Molding apparatus and molding method for flexible substrate based package May 14, 2001 Issued
Array ( [id] => 6129981 [patent_doc_number] => 20020076843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Semiconductor structure having a silicon oxynitride ARC layer and a method of forming the same' [patent_app_type] => new [patent_app_number] => 09/851899 [patent_app_country] => US [patent_app_date] => 2001-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4396 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20020076843.pdf [firstpage_image] =>[orig_patent_app_number] => 09851899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/851899
Semiconductor structure having a silicon oxynitride ARC layer and a method of forming the same May 8, 2001 Abandoned
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