
David Vu
Examiner (ID: 8926, Phone: (571)272-1798 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2048 |
| Issued Applications | 1711 |
| Pending Applications | 95 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4336997
[patent_doc_number] => 06333271
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-25
[patent_title] => 'Multi-step plasma etch method for plasma etch processing a microelectronic layer'
[patent_app_type] => 1
[patent_app_number] => 9/821559
[patent_app_country] => US
[patent_app_date] => 2001-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 4950
[patent_no_of_claims] => 16
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[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/333/06333271.pdf
[firstpage_image] =>[orig_patent_app_number] => 821559
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/821559 | Multi-step plasma etch method for plasma etch processing a microelectronic layer | Mar 28, 2001 | Issued |
Array
(
[id] => 1552907
[patent_doc_number] => 06399992
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-04
[patent_title] => 'Semiconductor device and method of making the same'
[patent_app_type] => B1
[patent_app_number] => 09/819619
[patent_app_country] => US
[patent_app_date] => 2001-03-29
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/399/06399992.pdf
[firstpage_image] =>[orig_patent_app_number] => 09819619
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/819619 | Semiconductor device and method of making the same | Mar 28, 2001 | Issued |
Array
(
[id] => 1395893
[patent_doc_number] => 06531324
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-03-11
[patent_title] => 'MFOS memory transistor & method of fabricating same'
[patent_app_type] => B2
[patent_app_number] => 09/820039
[patent_app_country] => US
[patent_app_date] => 2001-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/531/06531324.pdf
[firstpage_image] =>[orig_patent_app_number] => 09820039
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/820039 | MFOS memory transistor & method of fabricating same | Mar 27, 2001 | Issued |
Array
(
[id] => 1503404
[patent_doc_number] => 06465290
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-15
[patent_title] => 'Method of manufacturing a semiconductor device using a polymer film pattern'
[patent_app_type] => B1
[patent_app_number] => 09/818409
[patent_app_country] => US
[patent_app_date] => 2001-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 13140
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/465/06465290.pdf
[firstpage_image] =>[orig_patent_app_number] => 09818409
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/818409 | Method of manufacturing a semiconductor device using a polymer film pattern | Mar 26, 2001 | Issued |
Array
(
[id] => 5906571
[patent_doc_number] => 20020142500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Ultra-thin interface oxidation by ozonated water rinsing for emitter poly structure'
[patent_app_type] => new
[patent_app_number] => 09/818329
[patent_app_country] => US
[patent_app_date] => 2001-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4448
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0142/20020142500.pdf
[firstpage_image] =>[orig_patent_app_number] => 09818329
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/818329 | Ultra-thin interface oxidation by ozonated water rinsing for emitter poly structure | Mar 26, 2001 | Abandoned |
| 09/818369 | Method of shrinking the critical dimension of a gate in an integrated circuit using hard mask with high temperature oxidation | Mar 26, 2001 | Abandoned |
Array
(
[id] => 1588791
[patent_doc_number] => 06482698
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-19
[patent_title] => 'Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip'
[patent_app_type] => B2
[patent_app_number] => 09/817799
[patent_app_country] => US
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[pdf_file] => patents/06/482/06482698.pdf
[firstpage_image] =>[orig_patent_app_number] => 09817799
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/817799 | Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip | Mar 25, 2001 | Issued |
Array
(
[id] => 5844646
[patent_doc_number] => 20020132490
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-19
[patent_title] => 'Microstructure having a membrane and a wedge beneath and methods for manufacture of same'
[patent_app_type] => new
[patent_app_number] => 09/811289
[patent_app_country] => US
[patent_app_date] => 2001-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3395
[patent_no_of_claims] => 17
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[pdf_file] => publications/A1/0132/20020132490.pdf
[firstpage_image] =>[orig_patent_app_number] => 09811289
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/811289 | Microstructure having a membrane and a wedge beneath and methods for manufacture of same | Mar 15, 2001 | Abandoned |
Array
(
[id] => 1534519
[patent_doc_number] => 06489197
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-03
[patent_title] => 'Semiconductor memory device and method of fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 09/801289
[patent_app_country] => US
[patent_app_date] => 2001-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 7274
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[pdf_file] => patents/06/489/06489197.pdf
[firstpage_image] =>[orig_patent_app_number] => 09801289
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/801289 | Semiconductor memory device and method of fabricating the same | Mar 6, 2001 | Issued |
Array
(
[id] => 7645699
[patent_doc_number] => 06472270
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Elimination of voids at the oxide/silicon interface in trench-based structures'
[patent_app_type] => B1
[patent_app_number] => 09/800249
[patent_app_country] => US
[patent_app_date] => 2001-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/472/06472270.pdf
[firstpage_image] =>[orig_patent_app_number] => 09800249
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/800249 | Elimination of voids at the oxide/silicon interface in trench-based structures | Mar 5, 2001 | Issued |
Array
(
[id] => 1179812
[patent_doc_number] => 06740538
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-25
[patent_title] => 'Production process of light emitting device'
[patent_app_type] => B2
[patent_app_number] => 09/798999
[patent_app_country] => US
[patent_app_date] => 2001-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/06/740/06740538.pdf
[firstpage_image] =>[orig_patent_app_number] => 09798999
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/798999 | Production process of light emitting device | Mar 5, 2001 | Issued |
Array
(
[id] => 1490048
[patent_doc_number] => 06417017
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-09
[patent_title] => 'Optosemiconductor device and the method for its manufacture'
[patent_app_type] => B1
[patent_app_number] => 09/799289
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/799289 | Optosemiconductor device and the method for its manufacture | Mar 4, 2001 | Issued |
Array
(
[id] => 1196810
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[patent_title] => 'High temperature hydrogen anneal of silicon wafers supported on a silicon fixture'
[patent_app_type] => B2
[patent_app_number] => 09/792989
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/792989 | High temperature hydrogen anneal of silicon wafers supported on a silicon fixture | Feb 25, 2001 | Issued |
Array
(
[id] => 6476374
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[patent_title] => 'Semiconductor memory device'
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Array
(
[id] => 6692713
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[patent_title] => 'METHOD FOR TRANSFERRING AND STACKING OF SEMICONDUCTOR DEVICES'
[patent_app_type] => new
[patent_app_number] => 09/772195
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/772195 | Method for transferring and stacking of semiconductor devices | Jan 28, 2001 | Issued |
Array
(
[id] => 7964395
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[patent_title] => 'Method for enhancing vertical growth during the selective formation of silicon, and structures formed using same'
[patent_app_type] => B2
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/770909 | Method for enhancing vertical growth during the selective formation of silicon, and structures formed using same | Jan 25, 2001 | Issued |
Array
(
[id] => 6876689
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[patent_issue_date] => 2001-07-05
[patent_title] => 'Manufacture of field emission element'
[patent_app_type] => new-utility
[patent_app_number] => 09/764958
[patent_app_country] => US
[patent_app_date] => 2001-01-18
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[firstpage_image] =>[orig_patent_app_number] => 09764958
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/764958 | Manufacture of field emission element | Jan 17, 2001 | Abandoned |
Array
(
[id] => 6306759
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[patent_issue_date] => 2002-07-18
[patent_title] => 'Method of manufacturing bipolar device and structure thereof'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/765236 | Methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random access memory (DRAM) circuitry | Jan 15, 2001 | Issued |
Array
(
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[patent_title] => 'Method for producing trenches for DRAM cell configurations'
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[firstpage_image] =>[orig_patent_app_number] => 09753589
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/753589 | Method for producing trenches for DRAM cell configurations | Jan 2, 2001 | Issued |