Search

David W. Scheuermann

Examiner (ID: 15896)

Most Active Art Unit
2834
Art Unit(s)
CSDM, 2834, 3403, 2899
Total Applications
670
Issued Applications
548
Pending Applications
7
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4068093 [patent_doc_number] => 05933621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Method and Apparatus for terminal emulation in a semiconductor fabricating facility' [patent_app_type] => 1 [patent_app_number] => 8/824245 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3162 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933621.pdf [firstpage_image] =>[orig_patent_app_number] => 824245 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/824245
Method and Apparatus for terminal emulation in a semiconductor fabricating facility Mar 24, 1997 Issued
Array ( [id] => 3955307 [patent_doc_number] => 05930498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Apparatus for stably producing discreted grid points' [patent_app_type] => 1 [patent_app_number] => 8/827048 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 5339 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930498.pdf [firstpage_image] =>[orig_patent_app_number] => 827048 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827048
Apparatus for stably producing discreted grid points Mar 24, 1997 Issued
Array ( [id] => 3830309 [patent_doc_number] => 05812827 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Enhanced cardbus adapter and associated buffering circuitry for interfacing multiple cardbus/16 bit PC cards' [patent_app_type] => 1 [patent_app_number] => 8/812913 [patent_app_country] => US [patent_app_date] => 1997-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2980 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812827.pdf [firstpage_image] =>[orig_patent_app_number] => 812913 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/812913
Enhanced cardbus adapter and associated buffering circuitry for interfacing multiple cardbus/16 bit PC cards Mar 9, 1997 Issued
Array ( [id] => 3984063 [patent_doc_number] => 05887157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Local bus interface' [patent_app_type] => 1 [patent_app_number] => 8/810401 [patent_app_country] => US [patent_app_date] => 1997-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4352 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887157.pdf [firstpage_image] =>[orig_patent_app_number] => 810401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/810401
Local bus interface Mar 3, 1997 Issued
Array ( [id] => 4029880 [patent_doc_number] => 05963736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Software reconfigurable target I/O in a circuit emulation system' [patent_app_type] => 1 [patent_app_number] => 8/805852 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 6304 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963736.pdf [firstpage_image] =>[orig_patent_app_number] => 805852 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805852
Software reconfigurable target I/O in a circuit emulation system Mar 2, 1997 Issued
Array ( [id] => 3887906 [patent_doc_number] => 05838953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/800172 [patent_app_country] => US [patent_app_date] => 1997-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4279 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838953.pdf [firstpage_image] =>[orig_patent_app_number] => 800172 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/800172
Information processing apparatus Feb 12, 1997 Issued
Array ( [id] => 3759330 [patent_doc_number] => 05754869 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method and apparatus for managing power consumption of the CPU and on-board system devices of personal computers' [patent_app_type] => 1 [patent_app_number] => 8/789066 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4082 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754869.pdf [firstpage_image] =>[orig_patent_app_number] => 789066 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/789066
Method and apparatus for managing power consumption of the CPU and on-board system devices of personal computers Jan 26, 1997 Issued
Array ( [id] => 4057746 [patent_doc_number] => 05913052 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-15 [patent_title] => 'System and method for debugging digital signal processor software with an architectural view and general purpose computer employing the same' [patent_app_type] => 1 [patent_app_number] => 8/788754 [patent_app_country] => US [patent_app_date] => 1997-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5244 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/913/05913052.pdf [firstpage_image] =>[orig_patent_app_number] => 788754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788754
System and method for debugging digital signal processor software with an architectural view and general purpose computer employing the same Jan 23, 1997 Issued
Array ( [id] => 4010393 [patent_doc_number] => 05923578 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Data processing circuit' [patent_app_type] => 1 [patent_app_number] => 8/780893 [patent_app_country] => US [patent_app_date] => 1997-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6285 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923578.pdf [firstpage_image] =>[orig_patent_app_number] => 780893 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780893
Data processing circuit Jan 8, 1997 Issued
08/754120 COMPUTER VIRUS TRAP Nov 19, 1996 Abandoned
Array ( [id] => 3887892 [patent_doc_number] => 05838952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Emulator apparatus to break running program when variable is read without being initialized' [patent_app_type] => 1 [patent_app_number] => 8/747049 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4907 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838952.pdf [firstpage_image] =>[orig_patent_app_number] => 747049 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/747049
Emulator apparatus to break running program when variable is read without being initialized Nov 11, 1996 Issued
Array ( [id] => 4008328 [patent_doc_number] => 05920712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Emulation system having multiple emulator clock cycles per emulated clock cycle' [patent_app_type] => 1 [patent_app_number] => 8/748154 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7289 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920712.pdf [firstpage_image] =>[orig_patent_app_number] => 748154 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/748154
Emulation system having multiple emulator clock cycles per emulated clock cycle Nov 11, 1996 Issued
Array ( [id] => 3940703 [patent_doc_number] => 05946472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Apparatus and method for performing behavioral modeling in hardware emulation and simulation environments' [patent_app_type] => 1 [patent_app_number] => 8/742235 [patent_app_country] => US [patent_app_date] => 1996-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6697 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946472.pdf [firstpage_image] =>[orig_patent_app_number] => 742235 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/742235
Apparatus and method for performing behavioral modeling in hardware emulation and simulation environments Oct 30, 1996 Issued
Array ( [id] => 4089175 [patent_doc_number] => 05966527 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Apparatus, article of manufacture, method and system for simulating a mass-produced semiconductor device behavior' [patent_app_type] => 1 [patent_app_number] => 8/738542 [patent_app_country] => US [patent_app_date] => 1996-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7142 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966527.pdf [firstpage_image] =>[orig_patent_app_number] => 738542 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/738542
Apparatus, article of manufacture, method and system for simulating a mass-produced semiconductor device behavior Oct 27, 1996 Issued
Array ( [id] => 3857620 [patent_doc_number] => 05848264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Debug and video queue for multi-processor chip' [patent_app_type] => 1 [patent_app_number] => 8/740248 [patent_app_country] => US [patent_app_date] => 1996-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/848/05848264.pdf [firstpage_image] =>[orig_patent_app_number] => 740248 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/740248
Debug and video queue for multi-processor chip Oct 24, 1996 Issued
Array ( [id] => 4026753 [patent_doc_number] => 05880974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Merchandise simulator system and devices' [patent_app_type] => 1 [patent_app_number] => 8/733939 [patent_app_country] => US [patent_app_date] => 1996-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8460 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880974.pdf [firstpage_image] =>[orig_patent_app_number] => 733939 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/733939
Merchandise simulator system and devices Oct 17, 1996 Issued
Array ( [id] => 3977330 [patent_doc_number] => RE036462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections' [patent_app_type] => 2 [patent_app_number] => 8/726565 [patent_app_country] => US [patent_app_date] => 1996-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10815 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036462.pdf [firstpage_image] =>[orig_patent_app_number] => 726565 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/726565
Method to control paging subsystem processing in virtual memory data processing system during execution of critical code sections Oct 3, 1996 Issued
Array ( [id] => 3756001 [patent_doc_number] => 05787289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Display adapter supporting priority based functions' [patent_app_type] => 1 [patent_app_number] => 8/717674 [patent_app_country] => US [patent_app_date] => 1996-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3789 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787289.pdf [firstpage_image] =>[orig_patent_app_number] => 717674 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/717674
Display adapter supporting priority based functions Sep 22, 1996 Issued
Array ( [id] => 3980251 [patent_doc_number] => 05886904 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Latch optimization in hardware logic emulation systems' [patent_app_type] => 1 [patent_app_number] => 8/718655 [patent_app_country] => US [patent_app_date] => 1996-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 9394 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/886/05886904.pdf [firstpage_image] =>[orig_patent_app_number] => 718655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/718655
Latch optimization in hardware logic emulation systems Sep 22, 1996 Issued
Array ( [id] => 3836427 [patent_doc_number] => 05790831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'VL-bus/PCI-bus bridge' [patent_app_type] => 1 [patent_app_number] => 8/715901 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 38731 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790831.pdf [firstpage_image] =>[orig_patent_app_number] => 715901 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715901
VL-bus/PCI-bus bridge Sep 17, 1996 Issued
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