
David Z. Chen
Examiner (ID: 81, Phone: (571)270-7438 , Office: P/2815 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 797 |
| Issued Applications | 310 |
| Pending Applications | 106 |
| Abandoned Applications | 390 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17917620
[patent_doc_number] => 20220320016
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => INKJET PRINTING DEDICATED TEST PINS
[patent_app_type] => utility
[patent_app_number] => 17/223947
[patent_app_country] => US
[patent_app_date] => 2021-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8466
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223947
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/223947 | INKJET PRINTING DEDICATED TEST PINS | Apr 5, 2021 | Abandoned |
Array
(
[id] => 17115650
[patent_doc_number] => 20210296247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => ELECTRONIC DEVICES WITH YIELDING SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 17/202483
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23016
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202483
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/202483 | ELECTRONIC DEVICES WITH YIELDING SUBSTRATES | Mar 15, 2021 | Pending |
Array
(
[id] => 19314406
[patent_doc_number] => 12040231
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Semiconductor device including TSV and multiple insulating layers
[patent_app_type] => utility
[patent_app_number] => 17/201457
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 43
[patent_no_of_words] => 9266
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201457
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201457 | Semiconductor device including TSV and multiple insulating layers | Mar 14, 2021 | Issued |
Array
(
[id] => 17247236
[patent_doc_number] => 20210366981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => LED DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/162590
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11147
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162590
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/162590 | LED display apparatus including partition and gap-fill layer | Jan 28, 2021 | Issued |
Array
(
[id] => 16858385
[patent_doc_number] => 20210159130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => Method for forming hermetic package for a power semiconductor
[patent_app_type] => utility
[patent_app_number] => 17/129144
[patent_app_country] => US
[patent_app_date] => 2020-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4187
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129144
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/129144 | Method for forming hermetic package for a power semiconductor | Dec 20, 2020 | Issued |
Array
(
[id] => 17692281
[patent_doc_number] => 20220199574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => MICROELECTRONIC STRUCTURES INCLUDING BRIDGES
[patent_app_type] => utility
[patent_app_number] => 17/126448
[patent_app_country] => US
[patent_app_date] => 2020-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27268
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17126448
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/126448 | MICROELECTRONIC STRUCTURES INCLUDING BRIDGES | Dec 17, 2020 | Abandoned |
Array
(
[id] => 20566222
[patent_doc_number] => 12568849
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-03
[patent_title] => Dam for three-dimensional integrated circuit
[patent_app_type] => utility
[patent_app_number] => 17/121232
[patent_app_country] => US
[patent_app_date] => 2020-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 0
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121232
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/121232 | Dam for three-dimensional integrated circuit | Dec 13, 2020 | Issued |
Array
(
[id] => 17566908
[patent_doc_number] => 20220131057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => MICRO LIGHT-EMITTING DIODE
[patent_app_type] => utility
[patent_app_number] => 17/117143
[patent_app_country] => US
[patent_app_date] => 2020-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5528
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117143
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/117143 | MICRO LIGHT-EMITTING DIODE | Dec 9, 2020 | Abandoned |
Array
(
[id] => 16812498
[patent_doc_number] => 20210135053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-06
[patent_title] => LIGHT-EMITTING DIODE
[patent_app_type] => utility
[patent_app_number] => 17/118231
[patent_app_country] => US
[patent_app_date] => 2020-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118231
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/118231 | Light-emitting diode including conductive mirror structure | Dec 9, 2020 | Issued |
Array
(
[id] => 16731149
[patent_doc_number] => 20210098297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-01
[patent_title] => METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A DUMMY SECTION
[patent_app_type] => utility
[patent_app_number] => 17/117727
[patent_app_country] => US
[patent_app_date] => 2020-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6835
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117727
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/117727 | Method for manufacturing a semiconductor device having a dummy section | Dec 9, 2020 | Issued |
Array
(
[id] => 17130367
[patent_doc_number] => 20210305136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/109255
[patent_app_country] => US
[patent_app_date] => 2020-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15427
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109255
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/109255 | PACKAGE STRUCTURE | Dec 1, 2020 | Abandoned |
Array
(
[id] => 19670910
[patent_doc_number] => 12183681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-31
[patent_title] => Package structure having bridge structure for connection between semiconductor dies
[patent_app_type] => utility
[patent_app_number] => 17/105541
[patent_app_country] => US
[patent_app_date] => 2020-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 4954
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105541
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/105541 | Package structure having bridge structure for connection between semiconductor dies | Nov 25, 2020 | Issued |
Array
(
[id] => 17566815
[patent_doc_number] => 20220130964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/103620
[patent_app_country] => US
[patent_app_date] => 2020-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2903
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103620
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/103620 | High-voltage transistor and method for fabricating the same | Nov 23, 2020 | Issued |
Array
(
[id] => 16905161
[patent_doc_number] => 20210184077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => LIGHT-EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/097045
[patent_app_country] => US
[patent_app_date] => 2020-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097045
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/097045 | LIGHT-EMITTING DEVICE | Nov 12, 2020 | Abandoned |
Array
(
[id] => 16850646
[patent_doc_number] => 20210151391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => High Voltage Semiconductor Device with Step Topography Passivation Layer Stack
[patent_app_type] => utility
[patent_app_number] => 17/086979
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4507
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086979
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/086979 | High Voltage Semiconductor Device with Step Topography Passivation Layer Stack | Nov 1, 2020 | Abandoned |
Array
(
[id] => 17582917
[patent_doc_number] => 20220139772
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => INTERCONNECT STRUCTURES WITH AREA SELECTIVE ADHESION OR BARRIER MATERIALS FOR LOW RESISTANCE VIAS IN INTEGRATED CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 17/087523
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9605
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087523
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/087523 | INTERCONNECT STRUCTURES WITH AREA SELECTIVE ADHESION OR BARRIER MATERIALS FOR LOW RESISTANCE VIAS IN INTEGRATED CIRCUITS | Nov 1, 2020 | Pending |
Array
(
[id] => 19328965
[patent_doc_number] => 12046657
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-23
[patent_title] => Method of manufacturing a semiconductor device including capping layer, barrier layer and work function layer
[patent_app_type] => utility
[patent_app_number] => 17/076068
[patent_app_country] => US
[patent_app_date] => 2020-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076068
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/076068 | Method of manufacturing a semiconductor device including capping layer, barrier layer and work function layer | Oct 20, 2020 | Issued |
Array
(
[id] => 17963968
[patent_doc_number] => 20220344549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-27
[patent_title] => LIGHT-EMITTING DEVICE, WAVELENGTH CONVERSION UNIT, AND HEADLIGHT OR DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/642436
[patent_app_country] => US
[patent_app_date] => 2020-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10920
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17642436
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/642436 | LIGHT-EMITTING DEVICE, WAVELENGTH CONVERSION UNIT, AND HEADLIGHT OR DISPLAY APPARATUS | Sep 24, 2020 | Pending |
Array
(
[id] => 16586382
[patent_doc_number] => 20210020784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-21
[patent_title] => SEMICONDUCTOR FILM COMPRISING AN OXIDE CONTAINING IN ATOMS, Sn ATOMS AND Zn ATOMS
[patent_app_type] => utility
[patent_app_number] => 17/030618
[patent_app_country] => US
[patent_app_date] => 2020-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23179
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030618
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/030618 | SEMICONDUCTOR FILM COMPRISING AN OXIDE CONTAINING IN ATOMS, Sn ATOMS AND Zn ATOMS | Sep 23, 2020 | Abandoned |
Array
(
[id] => 18874870
[patent_doc_number] => 11862693
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Semiconductor devices including a drain captive structure having an air gap and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/000379
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6640
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000379
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/000379 | Semiconductor devices including a drain captive structure having an air gap and methods of forming the same | Aug 23, 2020 | Issued |