Search

Daxin Wu

Examiner (ID: 3941, Phone: (571)270-7721 , Office: P/2191 )

Most Active Art Unit
2191
Art Unit(s)
2198, 2191
Total Applications
622
Issued Applications
499
Pending Applications
39
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 765458 [patent_doc_number] => 07013252 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-14 [patent_title] => 'Simulated circuit node initializing and monitoring' [patent_app_type] => utility [patent_app_number] => 09/388766 [patent_app_country] => US [patent_app_date] => 1999-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4126 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/013/07013252.pdf [firstpage_image] =>[orig_patent_app_number] => 09388766 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/388766
Simulated circuit node initializing and monitoring Sep 1, 1999 Issued
Array ( [id] => 1105778 [patent_doc_number] => 06816819 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Graphical method and system for modeling and estimating construction parameters' [patent_app_type] => B1 [patent_app_number] => 09/386270 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6082 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/816/06816819.pdf [firstpage_image] =>[orig_patent_app_number] => 09386270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/386270
Graphical method and system for modeling and estimating construction parameters Aug 30, 1999 Issued
Array ( [id] => 1163899 [patent_doc_number] => 06772103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Method for selecting a parts kit detail' [patent_app_type] => B1 [patent_app_number] => 09/308278 [patent_app_country] => US [patent_app_date] => 1999-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6409 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772103.pdf [firstpage_image] =>[orig_patent_app_number] => 09308278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/308278
Method for selecting a parts kit detail Jul 8, 1999 Issued
Array ( [id] => 1105793 [patent_doc_number] => 06816825 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Simulation vector generation from HDL descriptions for observability-enhanced statement coverage' [patent_app_type] => B1 [patent_app_number] => 09/335755 [patent_app_country] => US [patent_app_date] => 1999-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20304 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/816/06816825.pdf [firstpage_image] =>[orig_patent_app_number] => 09335755 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/335755
Simulation vector generation from HDL descriptions for observability-enhanced statement coverage Jun 17, 1999 Issued
Array ( [id] => 1318159 [patent_doc_number] => 06618696 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Method of testing and simulating communication equipment over multiple transmission channels' [patent_app_type] => B1 [patent_app_number] => 09/332129 [patent_app_country] => US [patent_app_date] => 1999-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3876 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 480 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618696.pdf [firstpage_image] =>[orig_patent_app_number] => 09332129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/332129
Method of testing and simulating communication equipment over multiple transmission channels Jun 13, 1999 Issued
Array ( [id] => 984368 [patent_doc_number] => 06928401 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Interactive repeater insertion simulator (IRIS) system and method' [patent_app_type] => utility [patent_app_number] => 09/329556 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4180 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/928/06928401.pdf [firstpage_image] =>[orig_patent_app_number] => 09329556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329556
Interactive repeater insertion simulator (IRIS) system and method Jun 9, 1999 Issued
09/321136 SYSTEM, METHOD, AND ARTICLE OF MANUFACTURE FOR EFFECTIVELY CONVEYING WHICH COMPONENTS OF A SYSTEM ARE REQUIRED FOR IMPLEMENTATION OF TECHNOLOGY May 26, 1999 Abandoned
Array ( [id] => 6738759 [patent_doc_number] => 20030156127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'METHOD AND SYSTEM FOR VERIFYING THE INTEGRITY OF A CAD FORMAT TRANSLATION' [patent_app_type] => new [patent_app_number] => 09/317765 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4357 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20030156127.pdf [firstpage_image] =>[orig_patent_app_number] => 09317765 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317765
METHOD AND SYSTEM FOR VERIFYING THE INTEGRITY OF A CAD FORMAT TRANSLATION May 23, 1999 Abandoned
09/303833 DERATING FACTOR DETERMINATION FOR INTEGRATED CIRCUIT LOGIC DESIGN TOOLS May 2, 1999 Abandoned
Array ( [id] => 1067053 [patent_doc_number] => 06847384 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-25 [patent_title] => 'Translating objects between software applications which employ different data formats' [patent_app_type] => utility [patent_app_number] => 09/286133 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12334 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847384.pdf [firstpage_image] =>[orig_patent_app_number] => 09286133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286133
Translating objects between software applications which employ different data formats Mar 31, 1999 Issued
Array ( [id] => 7611441 [patent_doc_number] => 06904400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'Flash EEPROM memory emulator of non-flash EEPROM device and corresponding method' [patent_app_type] => utility [patent_app_number] => 09/265119 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 8094 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/904/06904400.pdf [firstpage_image] =>[orig_patent_app_number] => 09265119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/265119
Flash EEPROM memory emulator of non-flash EEPROM device and corresponding method Mar 8, 1999 Issued
Array ( [id] => 770642 [patent_doc_number] => 07010473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-07 [patent_title] => 'Method and apparatus for reusing subparts of one mechanical design for another mechanical design' [patent_app_type] => utility [patent_app_number] => 09/239578 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3342 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010473.pdf [firstpage_image] =>[orig_patent_app_number] => 09239578 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/239578
Method and apparatus for reusing subparts of one mechanical design for another mechanical design Jan 27, 1999 Issued
08/628533 DYNAMIC DATA EXCHANGE SERVER SIMULATOR Apr 2, 1996 Abandoned
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