Search

De'maris R Brown

Examiner (ID: 4353)

Most Active Art Unit
2437
Art Unit(s)
CSDE, 2437
Total Applications
45
Issued Applications
29
Pending Applications
0
Abandoned Applications
16

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11802309 [patent_doc_number] => 09543204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/455840 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 6152 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455840 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/455840
Method for manufacturing semiconductor device Apr 24, 2012 Issued
Array ( [id] => 9582099 [patent_doc_number] => 08772102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Methods of forming self-aligned contacts for a semiconductor device formed using replacement gate techniques' [patent_app_type] => utility [patent_app_number] => 13/455616 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 10789 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/455616
Methods of forming self-aligned contacts for a semiconductor device formed using replacement gate techniques Apr 24, 2012 Issued
Array ( [id] => 9850127 [patent_doc_number] => 08951855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Manufacturing method for semiconductor device having metal gate' [patent_app_type] => utility [patent_app_number] => 13/454337 [patent_app_country] => US [patent_app_date] => 2012-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5374 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/454337
Manufacturing method for semiconductor device having metal gate Apr 23, 2012 Issued
Array ( [id] => 10172002 [patent_doc_number] => 09202714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Methods for forming semiconductor device packages' [patent_app_type] => utility [patent_app_number] => 13/454598 [patent_app_country] => US [patent_app_date] => 2012-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 8391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454598 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/454598
Methods for forming semiconductor device packages Apr 23, 2012 Issued
Array ( [id] => 9697055 [patent_doc_number] => 20140246740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'IMPLANTATION OF GASEOUS CHEMICALS INTO CAVITIES FORMED IN INTERMEDIATE DIELECTRICS LAYERS FOR SUBSEQUENT THERMAL DIFFUSION RELEASE' [patent_app_type] => utility [patent_app_number] => 14/352057 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3046 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14352057 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/352057
Implantation of gaseous chemicals into cavities formed in intermediate dielectrics layers for subsequent thermal diffusion release Apr 18, 2012 Issued
Array ( [id] => 8910023 [patent_doc_number] => 08482089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Conductive compositions and processes for use in the manufacture of semiconductor devices—organic medium components' [patent_app_type] => utility [patent_app_number] => 13/446619 [patent_app_country] => US [patent_app_date] => 2012-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 15050 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13446619 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/446619
Conductive compositions and processes for use in the manufacture of semiconductor devices—organic medium components Apr 12, 2012 Issued
Array ( [id] => 8916406 [patent_doc_number] => 20130178031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 13/436878 [patent_app_country] => US [patent_app_date] => 2012-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436878 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/436878
Integration of non-volatile charge trap memory devices and logic CMOS devices Mar 30, 2012 Issued
Array ( [id] => 8403253 [patent_doc_number] => 20120235315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'METHOD FOR FABRICATING A FLEXIBLE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/415928 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5524 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415928 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/415928
METHOD FOR FABRICATING A FLEXIBLE DEVICE Mar 8, 2012 Abandoned
Array ( [id] => 10570374 [patent_doc_number] => 09293553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Graphene electrodes for electronic devices' [patent_app_type] => utility [patent_app_number] => 14/004220 [patent_app_country] => US [patent_app_date] => 2012-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5997 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14004220 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/004220
Graphene electrodes for electronic devices Mar 7, 2012 Issued
Array ( [id] => 9007069 [patent_doc_number] => RE044473 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2013-09-03 [patent_title] => 'Method for fabricating semiconductor device with vertical channel transistor' [patent_app_type] => reissue [patent_app_number] => 13/405507 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 2732 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13405507 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/405507
Method for fabricating semiconductor device with vertical channel transistor Feb 26, 2012 Issued
Array ( [id] => 8287362 [patent_doc_number] => 20120175689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'HYDROGEN PASSIVATION OF INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/396386 [patent_app_country] => US [patent_app_date] => 2012-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4017 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13396386 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/396386
HYDROGEN PASSIVATION OF INTEGRATED CIRCUITS Feb 13, 2012 Abandoned
Array ( [id] => 8240456 [patent_doc_number] => 20120149189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'HYDROGEN PASSIVATION OF INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/396420 [patent_app_country] => US [patent_app_date] => 2012-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4017 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13396420 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/396420
HYDROGEN PASSIVATION OF INTEGRATED CIRCUITS Feb 13, 2012 Abandoned
Array ( [id] => 10850870 [patent_doc_number] => 08877550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Methods for forming resistive switching memory elements by heating deposited layers' [patent_app_type] => utility [patent_app_number] => 13/371220 [patent_app_country] => US [patent_app_date] => 2012-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5955 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371220 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/371220
Methods for forming resistive switching memory elements by heating deposited layers Feb 9, 2012 Issued
Array ( [id] => 8179850 [patent_doc_number] => 20120112123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'ETCHING COMPOSITION FOR AN UNDER-BUMP METALLURGY LAYER' [patent_app_type] => utility [patent_app_number] => 13/347169 [patent_app_country] => US [patent_app_date] => 2012-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8574 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112123.pdf [firstpage_image] =>[orig_patent_app_number] => 13347169 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/347169
Etching composition for an under-bump metallurgy layer Jan 9, 2012 Issued
Array ( [id] => 9000227 [patent_doc_number] => 20130221351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'LAMINATE STRUCTURE INCLUDING OXIDE SEMICONDUCTOR THIN FILM LAYER, AND THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/881032 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 20757 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13881032 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/881032
Laminate structure including oxide semiconductor thin film layer, and thin film transistor Dec 26, 2011 Issued
Array ( [id] => 8981923 [patent_doc_number] => 08513037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Method of integrating slotted waveguide into CMOS process' [patent_app_type] => utility [patent_app_number] => 13/580872 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 3863 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13580872 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/580872
Method of integrating slotted waveguide into CMOS process Dec 1, 2011 Issued
Array ( [id] => 8701982 [patent_doc_number] => 08395205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/301136 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 9879 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301136
Semiconductor memory device and method of fabricating the same Nov 20, 2011 Issued
Array ( [id] => 8701982 [patent_doc_number] => 08395205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/301136 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 9879 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301136
Semiconductor memory device and method of fabricating the same Nov 20, 2011 Issued
Array ( [id] => 8701982 [patent_doc_number] => 08395205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/301136 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 9879 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301136
Semiconductor memory device and method of fabricating the same Nov 20, 2011 Issued
Array ( [id] => 8701982 [patent_doc_number] => 08395205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/301136 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 9879 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301136 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301136
Semiconductor memory device and method of fabricating the same Nov 20, 2011 Issued
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