Search

De'maris R Brown

Examiner (ID: 4353)

Most Active Art Unit
2437
Art Unit(s)
CSDE, 2437
Total Applications
45
Issued Applications
29
Pending Applications
0
Abandoned Applications
16

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4849608 [patent_doc_number] => 20080315350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Method for manufacturing semiconductor substrate, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/213514 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11002 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315350.pdf [firstpage_image] =>[orig_patent_app_number] => 12213514 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213514
Method of manufacturing semiconductor substrate with reduced gap size between single-crystalline layers Jun 19, 2008 Issued
Array ( [id] => 5446523 [patent_doc_number] => 20090047749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'Methods of manufacturing thin film transistor and display device' [patent_app_type] => utility [patent_app_number] => 12/213253 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2829 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20090047749.pdf [firstpage_image] =>[orig_patent_app_number] => 12213253 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213253
Methods of manufacturing thin film transistor and display device Jun 16, 2008 Abandoned
Array ( [id] => 4852669 [patent_doc_number] => 20080318412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/138964 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3188 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318412.pdf [firstpage_image] =>[orig_patent_app_number] => 12138964 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/138964
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Jun 12, 2008 Abandoned
Array ( [id] => 5367957 [patent_doc_number] => 20090305516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'METHOD FOR PURIFYING ACETYLENE GAS FOR USE IN SEMICONDUCTOR PROCESSES' [patent_app_type] => utility [patent_app_number] => 12/133223 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7940 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20090305516.pdf [firstpage_image] =>[orig_patent_app_number] => 12133223 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/133223
Method for purifying acetylene gas for use in semiconductor processes Jun 3, 2008 Issued
Array ( [id] => 5300219 [patent_doc_number] => 20090294871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING RARE EARTH METAL SILICIDE CONTACT LAYERS AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/130263 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294871.pdf [firstpage_image] =>[orig_patent_app_number] => 12130263 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/130263
SEMICONDUCTOR DEVICES HAVING RARE EARTH METAL SILICIDE CONTACT LAYERS AND METHODS FOR FABRICATING THE SAME May 29, 2008 Abandoned
Array ( [id] => 4711217 [patent_doc_number] => 20080299743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/153644 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14531 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20080299743.pdf [firstpage_image] =>[orig_patent_app_number] => 12153644 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153644
Method for manufacturing a semiconductor device with irradiation of single crystal semiconductor layer in an inert atmosphere May 21, 2008 Issued
Array ( [id] => 4792233 [patent_doc_number] => 20080293207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'INTEGRATION OF NON-VOLATILE CHARGE TRAP MEMORY DEVICES AND LOGIC CMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 12/125864 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293207.pdf [firstpage_image] =>[orig_patent_app_number] => 12125864 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125864
Integration of non-volatile charge trap memory devices and logic CMOS devices May 21, 2008 Issued
Array ( [id] => 8591760 [patent_doc_number] => 08349635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-08 [patent_title] => 'Encapsulated MEMS device and method to form the same' [patent_app_type] => utility [patent_app_number] => 12/124043 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 7526 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12124043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/124043
Encapsulated MEMS device and method to form the same May 19, 2008 Issued
Array ( [id] => 71483 [patent_doc_number] => 07754535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Method of manufacturing chip integrated substrate' [patent_app_type] => utility [patent_app_number] => 12/123673 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 19 [patent_no_of_words] => 4817 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/754/07754535.pdf [firstpage_image] =>[orig_patent_app_number] => 12123673 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/123673
Method of manufacturing chip integrated substrate May 19, 2008 Issued
Array ( [id] => 4778959 [patent_doc_number] => 20080286957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'METHOD FORMING EPITAXIAL SILICON STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/122783 [patent_app_country] => US [patent_app_date] => 2008-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4779 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20080286957.pdf [firstpage_image] =>[orig_patent_app_number] => 12122783 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/122783
METHOD FORMING EPITAXIAL SILICON STRUCTURE May 18, 2008 Abandoned
Array ( [id] => 4778964 [patent_doc_number] => 20080286962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'METHOD FOR FABRICATING METAL PAD' [patent_app_type] => utility [patent_app_number] => 12/122313 [patent_app_country] => US [patent_app_date] => 2008-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2153 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20080286962.pdf [firstpage_image] =>[orig_patent_app_number] => 12122313 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/122313
METHOD FOR FABRICATING METAL PAD May 15, 2008 Abandoned
Array ( [id] => 4444674 [patent_doc_number] => 07863176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Low-resistance interconnects and methods of making same' [patent_app_type] => utility [patent_app_number] => 12/119994 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3056 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863176.pdf [firstpage_image] =>[orig_patent_app_number] => 12119994 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119994
Low-resistance interconnects and methods of making same May 12, 2008 Issued
Array ( [id] => 270446 [patent_doc_number] => 07563682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'LDMOS transistor device, integrated circuit, and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/119773 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4111 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/563/07563682.pdf [firstpage_image] =>[orig_patent_app_number] => 12119773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119773
LDMOS transistor device, integrated circuit, and fabrication method thereof May 12, 2008 Issued
Array ( [id] => 202517 [patent_doc_number] => 07632727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Method of forming stepped recesses for embedded strain elements in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/119384 [patent_app_country] => US [patent_app_date] => 2008-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3705 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/632/07632727.pdf [firstpage_image] =>[orig_patent_app_number] => 12119384 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/119384
Method of forming stepped recesses for embedded strain elements in a semiconductor device May 11, 2008 Issued
Array ( [id] => 159190 [patent_doc_number] => 07674683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Bulk-isolated PN diode and method of forming a bulk-isolated PN diode' [patent_app_type] => utility [patent_app_number] => 12/111014 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 8633 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/674/07674683.pdf [firstpage_image] =>[orig_patent_app_number] => 12111014 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111014
Bulk-isolated PN diode and method of forming a bulk-isolated PN diode Apr 27, 2008 Issued
Array ( [id] => 1076885 [patent_doc_number] => 07615396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-10 [patent_title] => 'Photodiode stack for photo MOS relay using junction isolation technology' [patent_app_type] => utility [patent_app_number] => 12/150383 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2707 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/615/07615396.pdf [firstpage_image] =>[orig_patent_app_number] => 12150383 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150383
Photodiode stack for photo MOS relay using junction isolation technology Apr 27, 2008 Issued
Array ( [id] => 4719501 [patent_doc_number] => 20080242024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/050664 [patent_app_country] => US [patent_app_date] => 2008-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5752 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242024.pdf [firstpage_image] =>[orig_patent_app_number] => 12050664 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/050664
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Mar 17, 2008 Abandoned
Array ( [id] => 4822133 [patent_doc_number] => 20080227273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/048844 [patent_app_country] => US [patent_app_date] => 2008-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3717 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20080227273.pdf [firstpage_image] =>[orig_patent_app_number] => 12048844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/048844
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Mar 13, 2008 Abandoned
Array ( [id] => 4817008 [patent_doc_number] => 20080224267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING HYDROGEN IMPLANTATION LAYERS AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/045803 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3332 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224267.pdf [firstpage_image] =>[orig_patent_app_number] => 12045803 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045803
SEMICONDUCTOR DEVICES INCLUDING HYDROGEN IMPLANTATION LAYERS AND METHODS OF FORMING THE SAME Mar 10, 2008 Abandoned
Array ( [id] => 4752622 [patent_doc_number] => 20080160697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Metal-oxide-semiconductor transistor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/045683 [patent_app_country] => US [patent_app_date] => 2008-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4258 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20080160697.pdf [firstpage_image] =>[orig_patent_app_number] => 12045683 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045683
Method of manufacturing a metal-oxide-semiconductor with reduced on-resistance Mar 9, 2008 Issued
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