Search

Dean Phan

Examiner (ID: 16518, Phone: (571)270-1002 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2182
Total Applications
601
Issued Applications
412
Pending Applications
47
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16527463 [patent_doc_number] => 20200401543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => AUTO-ADDRESSING WITH POSITION DETERMINATION OF BUS SUBSCRIBERS [patent_app_type] => utility [patent_app_number] => 16/977455 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16977455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/977455
Auto-addressing with position determination of bus subscribers May 13, 2019 Issued
Array ( [id] => 15506017 [patent_doc_number] => 20200053197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => ELECTRONIC DEVICE INPUT/OUTPUT SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/358627 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358627 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358627
ELECTRONIC DEVICE INPUT/OUTPUT SYSTEM AND METHOD Mar 18, 2019 Abandoned
Array ( [id] => 14473071 [patent_doc_number] => 20190188180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => AUTOMATICALLY CONFIGURING A UNIVERSAL SERIAL BUS (USB) TYPE-C PORT OF A COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/281266 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/281266
Automatically configuring a universal serial bus (USB) type-C port of a computing device Feb 20, 2019 Issued
Array ( [id] => 17454939 [patent_doc_number] => 11269800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Integrated communication unit [patent_app_type] => utility [patent_app_number] => 16/971978 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3475 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16971978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/971978
Integrated communication unit Feb 5, 2019 Issued
Array ( [id] => 14689119 [patent_doc_number] => 20190243675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => EFFICIENT VIRTUAL I/O ADDRESS TRANSLATION [patent_app_type] => utility [patent_app_number] => 16/267356 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267356
Efficient virtual I/O address translation Feb 3, 2019 Issued
Array ( [id] => 16209072 [patent_doc_number] => 20200242062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => REDUCING COUPLING AND POWER NOISE ON PAM-4 I/O INTERFACE [patent_app_type] => utility [patent_app_number] => 15/929094 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929094
Reducing coupling and power noise on PAM-4 I/O interface Jan 27, 2019 Issued
Array ( [id] => 17327365 [patent_doc_number] => 11218397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Dual purpose NIC/PCIe protocol logic analyzer [patent_app_type] => utility [patent_app_number] => 16/258600 [patent_app_country] => US [patent_app_date] => 2019-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3856 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258600
Dual purpose NIC/PCIe protocol logic analyzer Jan 26, 2019 Issued
Array ( [id] => 15854965 [patent_doc_number] => 10642768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Semiconductor device and control method of semiconductor device [patent_app_type] => utility [patent_app_number] => 16/253802 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6556 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253802 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/253802
Semiconductor device and control method of semiconductor device Jan 21, 2019 Issued
Array ( [id] => 17613942 [patent_doc_number] => 20220156222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => KEYBOARD, BUS UNIT, BUS CONTROL UNIT AND METHOD FOR OPERATING A KEYBOARD [patent_app_type] => utility [patent_app_number] => 17/422804 [patent_app_country] => US [patent_app_date] => 2019-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17422804 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/422804
KEYBOARD, BUS UNIT, BUS CONTROL UNIT AND METHOD FOR OPERATING A KEYBOARD Jan 14, 2019 Abandoned
Array ( [id] => 16698608 [patent_doc_number] => 10949205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Implementation of execution compression of instructions in slice target register file mapper [patent_app_type] => utility [patent_app_number] => 16/226793 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9353 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16226793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/226793
Implementation of execution compression of instructions in slice target register file mapper Dec 19, 2018 Issued
Array ( [id] => 17238451 [patent_doc_number] => 11182331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Communication system and communication unit [patent_app_type] => utility [patent_app_number] => 16/959510 [patent_app_country] => US [patent_app_date] => 2018-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9917 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959510 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959510
Communication system and communication unit Oct 31, 2018 Issued
Array ( [id] => 15720439 [patent_doc_number] => 20200106987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => MULTI-HEAD VIDEO PRESENTATION CABLE [patent_app_type] => utility [patent_app_number] => 16/148199 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148199 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148199
MULTI-HEAD VIDEO PRESENTATION CABLE Sep 30, 2018 Abandoned
Array ( [id] => 16496671 [patent_doc_number] => 10862730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Selective connection for interface circuitry [patent_app_type] => utility [patent_app_number] => 16/144108 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10907 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/144108
Selective connection for interface circuitry Sep 26, 2018 Issued
Array ( [id] => 14872711 [patent_doc_number] => 20190286597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SYSTEM, ELECTRONIC DEVICE, AND CONNECTION CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/143056 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16143056 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/143056
System, electronic device, and connection control method Sep 25, 2018 Issued
Array ( [id] => 15685541 [patent_doc_number] => 20200097434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => ENHANCED HIGH DATA RATE TECHNIQUE FOR I3C [patent_app_type] => utility [patent_app_number] => 16/142456 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142456
ENHANCED HIGH DATA RATE TECHNIQUE FOR I3C Sep 25, 2018 Abandoned
Array ( [id] => 16130127 [patent_doc_number] => 10698824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Scalable coherence management independent of transport protocol [patent_app_type] => utility [patent_app_number] => 16/141704 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 11656 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141704 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141704
Scalable coherence management independent of transport protocol Sep 24, 2018 Issued
Array ( [id] => 16737749 [patent_doc_number] => 10963401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Control arrangement for a coffee machine [patent_app_type] => utility [patent_app_number] => 16/629998 [patent_app_country] => US [patent_app_date] => 2018-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3336 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16629998 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/629998
Control arrangement for a coffee machine Jul 9, 2018 Issued
Array ( [id] => 15472943 [patent_doc_number] => 10552349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-04 [patent_title] => System and method for dynamic pipelining of direct memory access (DMA) transactions [patent_app_type] => utility [patent_app_number] => 16/008084 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5005 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008084 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008084
System and method for dynamic pipelining of direct memory access (DMA) transactions Jun 13, 2018 Issued
Array ( [id] => 15685531 [patent_doc_number] => 20200097429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => RACK CONTROLLER WITH NATIVE SUPPORT FOR INTELLIGENT PATCHING EQUIPMENT INSTALLED IN MULTIPLE RACKS [patent_app_type] => utility [patent_app_number] => 16/619076 [patent_app_country] => US [patent_app_date] => 2018-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16619076 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/619076
Rack controller with native support for intelligent patching equipment installed in multiple racks Jun 4, 2018 Issued
Array ( [id] => 15075033 [patent_doc_number] => 10467007 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-05 [patent_title] => Core for controlling multiple serial peripheral interfaces (SPI's) [patent_app_type] => utility [patent_app_number] => 15/995303 [patent_app_country] => US [patent_app_date] => 2018-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 5 [patent_no_of_words] => 3459 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15995303 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/995303
Core for controlling multiple serial peripheral interfaces (SPI's) May 31, 2018 Issued
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