Search

Dean Phan

Examiner (ID: 496)

Most Active Art Unit
2184
Art Unit(s)
2182, 2184
Total Applications
614
Issued Applications
419
Pending Applications
51
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16659427 [patent_doc_number] => 20210056064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => WATCHDOG FOR ADDRESSING DEADLOCKED STATES [patent_app_type] => utility [patent_app_number] => 16/547174 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547174 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547174
Watchdog for addressing deadlocked states Aug 20, 2019 Issued
Array ( [id] => 17091776 [patent_doc_number] => 11119966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Mixed-mode radio frequency front-end interface [patent_app_type] => utility [patent_app_number] => 16/546495 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17625 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546495 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546495
Mixed-mode radio frequency front-end interface Aug 20, 2019 Issued
Array ( [id] => 15561713 [patent_doc_number] => 20200065268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => DRAM INTERFACE MODE WITH INTERRUPTIBLE INTERNAL TRANSFER OPERATION [patent_app_type] => utility [patent_app_number] => 16/546176 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546176 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546176
DRAM interface mode with interruptible internal transfer operation Aug 19, 2019 Issued
Array ( [id] => 16478354 [patent_doc_number] => 10853302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Data routing by a driver installed from a computing device [patent_app_type] => utility [patent_app_number] => 16/540953 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5280 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540953
Data routing by a driver installed from a computing device Aug 13, 2019 Issued
Array ( [id] => 16623252 [patent_doc_number] => 20210041905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => DIGITAL CIRCUIT TO DETECT PRESENCE AND QUALITY OF AN EXTERNAL TIMING DEVICE [patent_app_type] => utility [patent_app_number] => 16/537073 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537073 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537073
Digital circuit to detect presence and quality of an external timing device Aug 8, 2019 Issued
Array ( [id] => 16431602 [patent_doc_number] => 10831684 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Kernal driver extension system and method [patent_app_type] => utility [patent_app_number] => 16/527263 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9865 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527263 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527263
Kernal driver extension system and method Jul 30, 2019 Issued
Array ( [id] => 17269311 [patent_doc_number] => 11194738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Implementing management commands utilizing an in-band interface [patent_app_type] => utility [patent_app_number] => 16/525297 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525297
Implementing management commands utilizing an in-band interface Jul 28, 2019 Issued
Array ( [id] => 16446963 [patent_doc_number] => 10838892 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-17 [patent_title] => Multistage round robin arbitration [patent_app_type] => utility [patent_app_number] => 16/525444 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6267 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525444
Multistage round robin arbitration Jul 28, 2019 Issued
Array ( [id] => 17574206 [patent_doc_number] => 11322480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/523587 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 15168 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523587 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/523587
Semiconductor memory device Jul 25, 2019 Issued
Array ( [id] => 16801825 [patent_doc_number] => 10996767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Management of user context for operation of IHS peripherals [patent_app_type] => utility [patent_app_number] => 16/521972 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521972
Management of user context for operation of IHS peripherals Jul 24, 2019 Issued
Array ( [id] => 17597903 [patent_doc_number] => 20220147477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => BINDING DOWNSTREAM USB PORTS TO UPSTREAM USB PORTS [patent_app_type] => utility [patent_app_number] => 17/419318 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17419318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/419318
Binding downstream USB ports to upstream USB ports Jul 24, 2019 Issued
Array ( [id] => 15090341 [patent_doc_number] => 20190339981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => MEMORY-BASED DISTRIBUTED PROCESSOR ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/512546 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/512546
Memory-based distributed processor architecture Jul 15, 2019 Issued
Array ( [id] => 15214043 [patent_doc_number] => 20190369708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => POWER SAVING FOR TYPE-C CONNECTORS [patent_app_type] => utility [patent_app_number] => 16/458024 [patent_app_country] => US [patent_app_date] => 2019-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458024 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458024
Power saving for type-C connectors Jun 28, 2019 Issued
Array ( [id] => 16527463 [patent_doc_number] => 20200401543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => AUTO-ADDRESSING WITH POSITION DETERMINATION OF BUS SUBSCRIBERS [patent_app_type] => utility [patent_app_number] => 16/977455 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16977455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/977455
Auto-addressing with position determination of bus subscribers May 13, 2019 Issued
Array ( [id] => 15506017 [patent_doc_number] => 20200053197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => ELECTRONIC DEVICE INPUT/OUTPUT SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/358627 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16358627 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/358627
ELECTRONIC DEVICE INPUT/OUTPUT SYSTEM AND METHOD Mar 18, 2019 Abandoned
Array ( [id] => 14473071 [patent_doc_number] => 20190188180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => AUTOMATICALLY CONFIGURING A UNIVERSAL SERIAL BUS (USB) TYPE-C PORT OF A COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/281266 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/281266
Automatically configuring a universal serial bus (USB) type-C port of a computing device Feb 20, 2019 Issued
Array ( [id] => 17454939 [patent_doc_number] => 11269800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Integrated communication unit [patent_app_type] => utility [patent_app_number] => 16/971978 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3475 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16971978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/971978
Integrated communication unit Feb 5, 2019 Issued
Array ( [id] => 14689119 [patent_doc_number] => 20190243675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => EFFICIENT VIRTUAL I/O ADDRESS TRANSLATION [patent_app_type] => utility [patent_app_number] => 16/267356 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267356
Efficient virtual I/O address translation Feb 3, 2019 Issued
Array ( [id] => 16209072 [patent_doc_number] => 20200242062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => REDUCING COUPLING AND POWER NOISE ON PAM-4 I/O INTERFACE [patent_app_type] => utility [patent_app_number] => 15/929094 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929094
Reducing coupling and power noise on PAM-4 I/O interface Jan 27, 2019 Issued
Array ( [id] => 17327365 [patent_doc_number] => 11218397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Dual purpose NIC/PCIe protocol logic analyzer [patent_app_type] => utility [patent_app_number] => 16/258600 [patent_app_country] => US [patent_app_date] => 2019-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3856 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258600
Dual purpose NIC/PCIe protocol logic analyzer Jan 26, 2019 Issued
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