Search

Dean Phan

Examiner (ID: 8359, Phone: (571)270-1002 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2182
Total Applications
611
Issued Applications
415
Pending Applications
52
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20550166 [patent_doc_number] => 12560955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Semiconductor device and semiconductor system [patent_app_type] => utility [patent_app_number] => 17/748770 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 1082 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/748770
Semiconductor device and semiconductor system May 18, 2022 Issued
Array ( [id] => 18965843 [patent_doc_number] => 11899608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Method and apparatus for providing C-PHY interface via FPGA IO interface [patent_app_type] => utility [patent_app_number] => 17/746563 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9227 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746563
Method and apparatus for providing C-PHY interface via FPGA IO interface May 16, 2022 Issued
Array ( [id] => 17832303 [patent_doc_number] => 20220269607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => MULTI-PROCESSOR, MULTI-DOMAIN, MULTI-PROTOCOL, CACHE COHERENT, SPECULATION AWARE SHARED MEMORY AND INTERCONNECT [patent_app_type] => utility [patent_app_number] => 17/740811 [patent_app_country] => US [patent_app_date] => 2022-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17740811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/740811
MULTI-PROCESSOR, MULTI-DOMAIN, MULTI-PROTOCOL, CACHE COHERENT, SPECULATION AWARE SHARED MEMORY AND INTERCONNECT May 9, 2022 Pending
Array ( [id] => 17931944 [patent_doc_number] => 20220327069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => NETWORK DEVICE CONFIGURATION BASED ON SLAVE DEVICE TYPE [patent_app_type] => utility [patent_app_number] => 17/739749 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739749 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739749
Network device configuration based on slave device type May 8, 2022 Issued
Array ( [id] => 17992041 [patent_doc_number] => 20220358078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => INTEGRATED CIRCUIT, DATA PROCESSING DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/737527 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737527
Integrated circuit, data processing device and method May 4, 2022 Issued
Array ( [id] => 17794300 [patent_doc_number] => 20220253392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => EMULATED ENDPOINT CONFIGURATION [patent_app_type] => utility [patent_app_number] => 17/660797 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660797
Emulated endpoint configuration Apr 25, 2022 Issued
Array ( [id] => 19638857 [patent_doc_number] => 12169464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Seamlessly integrated microcontroller chip [patent_app_type] => utility [patent_app_number] => 17/705299 [patent_app_country] => US [patent_app_date] => 2022-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 31189 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705299
Seamlessly integrated microcontroller chip Mar 25, 2022 Issued
Array ( [id] => 17736731 [patent_doc_number] => 20220222190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => Seamlessly Integrated Microcontroller Chip [patent_app_type] => utility [patent_app_number] => 17/705298 [patent_app_country] => US [patent_app_date] => 2022-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705298 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705298
Seamlessly integrated microcontroller chip Mar 25, 2022 Issued
Array ( [id] => 19313052 [patent_doc_number] => 12038864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Signal processing circuit and reception device [patent_app_type] => utility [patent_app_number] => 17/654488 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10389 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654488
Signal processing circuit and reception device Mar 10, 2022 Issued
Array ( [id] => 18599095 [patent_doc_number] => 20230273895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHODS AND SYSTEMS FOR SERIAL CONTROL WITH INTERLEAVED REGISTER MAPPING [patent_app_type] => utility [patent_app_number] => 17/682452 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682452
Methods and systems for serial control with interleaved register mapping Feb 27, 2022 Issued
Array ( [id] => 17675088 [patent_doc_number] => 20220188255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => METHODS FOR IDENTIFYING TARGET SLAVE ADDRESS FOR SERIAL COMMUNICATION INTERFACE [patent_app_type] => utility [patent_app_number] => 17/652413 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652413 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652413
Methods for identifying target slave address for serial communication interface Feb 23, 2022 Issued
Array ( [id] => 19014731 [patent_doc_number] => 11921661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Stand with dual purpose RJ12 interface [patent_app_type] => utility [patent_app_number] => 17/679738 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679738
Stand with dual purpose RJ12 interface Feb 23, 2022 Issued
Array ( [id] => 18687130 [patent_doc_number] => 11782867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Method to improve communication speed in existing control system [patent_app_type] => utility [patent_app_number] => 17/651588 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5237 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651588
Method to improve communication speed in existing control system Feb 17, 2022 Issued
Array ( [id] => 17831987 [patent_doc_number] => 20220269291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => FAULT TOLERANT AIRCRAFT FLIGHT CONTROL SYSTEM AND AIRCRAFT PREFERABLY HAVING SUCH AN AIRCRAFT FLIGHT CONTROL SYSTEM [patent_app_type] => utility [patent_app_number] => 17/670852 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670852
FAULT TOLERANT AIRCRAFT FLIGHT CONTROL SYSTEM AND AIRCRAFT PREFERABLY HAVING SUCH AN AIRCRAFT FLIGHT CONTROL SYSTEM Feb 13, 2022 Abandoned
Array ( [id] => 20647392 [patent_doc_number] => 12602335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Memory interface with reduced energy transmit mode [patent_app_type] => utility [patent_app_number] => 17/668226 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 10406 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668226
Memory interface with reduced energy transmit mode Feb 8, 2022 Issued
Array ( [id] => 17613881 [patent_doc_number] => 20220156161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY-BASED DISTRIBUTED PROCESSOR ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/649975 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36284 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649975
MEMORY-BASED DISTRIBUTED PROCESSOR ARCHITECTURE Feb 3, 2022 Abandoned
Array ( [id] => 19451198 [patent_doc_number] => 20240311328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MULTI-MODE VIRTUAL SERIAL PORT CHIP, IMPLEMENTATION METHOD, AND FIRMWARE DOWNLOADING SYSTEM AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/262205 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18262205 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/262205
Multi-mode virtual serial port chip, implementation method, and firmware downloading system and method thereof Jan 19, 2022 Issued
Array ( [id] => 19443102 [patent_doc_number] => 12093366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Method and apparatus for establishing trusted PCIe resource sharing [patent_app_type] => utility [patent_app_number] => 17/577603 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7898 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577603 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/577603
Method and apparatus for establishing trusted PCIe resource sharing Jan 17, 2022 Issued
Array ( [id] => 18486888 [patent_doc_number] => 20230214234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SYSTEMS AND METHODS FOR CONFIGURATION-BASED PERFORMANCE PROFILE [patent_app_type] => utility [patent_app_number] => 17/570134 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17570134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/570134
SYSTEMS AND METHODS FOR CONFIGURATION-BASED PERFORMANCE PROFILE Jan 5, 2022 Abandoned
Array ( [id] => 18795528 [patent_doc_number] => 11829307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => DRAM interface mode with interruptible internal transfer operation [patent_app_type] => utility [patent_app_number] => 17/568645 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568645
DRAM interface mode with interruptible internal transfer operation Jan 3, 2022 Issued
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